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Subject: Re: [PATCH v2 4/4] clk: qcom: lpass: Add support for LPASS clock controller for SC7180
From:   Stephen Boyd <sboyd@kernel.org>
Cc:     David Brown <david.brown@linaro.org>,
        Rajendra Nayak <rnayak@codeaurora.org>,
        linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org,
        linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
        Andy Gross <agross@kernel.org>, devicetree@vger.kernel.org,
        robh@kernel.org, robh+dt@kernel.org,
        Taniya Das <tdas@codeaurora.org>
To:     Michael Turquette <mturquette@baylibre.com>,
        Taniya Das <tdas@codeaurora.org>
Date:   Tue, 26 May 2020 20:10:40 -0700
Message-ID: <159054904061.88029.1394425232497625411@swboyd.mtv.corp.google.com>
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Quoting Taniya Das (2020-05-17 02:22:24)
> diff --git a/drivers/clk/qcom/lpasscorecc-sc7180.c b/drivers/clk/qcom/lpa=
sscorecc-sc7180.c
> new file mode 100644
> index 0000000..86e3599
> --- /dev/null
> +++ b/drivers/clk/qcom/lpasscorecc-sc7180.c
> @@ -0,0 +1,479 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Copyright (c) 2020, The Linux Foundation. All rights reserved.
> + */
> +
> +#include <linux/clk-provider.h>
> +#include <linux/err.h>
> +#include <linux/module.h>
> +#include <linux/of_device.h>
> +#include <linux/pm_clock.h>
> +#include <linux/pm_runtime.h>
> +#include <linux/of.h>
> +#include <linux/regmap.h>
> +
> +#include <dt-bindings/clock/qcom,lpasscorecc-sc7180.h>
> +
> +#include "clk-alpha-pll.h"
> +#include "clk-branch.h"
> +#include "clk-rcg.h"
> +#include "clk-regmap.h"
> +#include "common.h"
> +#include "gdsc.h"
> +
> +enum {
> +       P_BI_TCXO,
> +       P_LPASS_LPAAUDIO_DIG_PLL_OUT_ODD,
> +       P_SLEEP_CLK,
> +};
> +
> +static struct pll_vco fabia_vco[] =3D {
> +       { 249600000, 2000000000, 0 },
> +};
> +
> +static const struct alpha_pll_config lpass_lpaaudio_dig_pll_config =3D {
> +       .l =3D 0x20,
[...]
> +
> +static struct regmap_config lpass_core_cc_sc7180_regmap_config =3D {
> +       .reg_bits =3D 32,
> +       .reg_stride =3D 4,
> +       .val_bits =3D 32,
> +       .fast_io =3D true,
> +};
> +
> +static const struct qcom_cc_desc lpass_core_hm_sc7180_desc =3D {
> +       .config =3D &lpass_core_cc_sc7180_regmap_config,
> +       .gdscs =3D lpass_core_hm_sc7180_gdscs,
> +       .num_gdscs =3D ARRAY_SIZE(lpass_core_hm_sc7180_gdscs),
> +};
> +
> +static const struct qcom_cc_desc lpass_core_cc_sc7180_desc =3D {
> +       .config =3D &lpass_core_cc_sc7180_regmap_config,
> +       .clks =3D lpass_core_cc_sc7180_clocks,
> +       .num_clks =3D ARRAY_SIZE(lpass_core_cc_sc7180_clocks),
> +};
> +
> +static const struct qcom_cc_desc lpass_audio_hm_sc7180_desc =3D {
> +       .config =3D &lpass_core_cc_sc7180_regmap_config,
> +       .gdscs =3D lpass_audio_hm_sc7180_gdscs,
> +       .num_gdscs =3D ARRAY_SIZE(lpass_audio_hm_sc7180_gdscs),
> +};
> +
> +

Drop double newline please.

> +static int lpass_core_cc_sc7180_probe(struct platform_device *pdev)
> +{
> +       const struct qcom_cc_desc *desc;
> +       struct regmap *regmap;
> +       int ret;
> +
> +       lpass_core_cc_sc7180_regmap_config.name =3D "lpass_audio_cc";
> +       desc =3D &lpass_audio_hm_sc7180_desc;
> +       ret =3D qcom_cc_probe_by_index(pdev, 1, desc);
> +       if (ret)
> +               return ret;
> +
> +       lpass_core_cc_sc7180_regmap_config.name =3D "lpass_core_cc";
> +       regmap =3D qcom_cc_map(pdev, &lpass_core_cc_sc7180_desc);
> +       if (IS_ERR(regmap))
> +               return PTR_ERR(regmap);
> +
> +       /*
> +        * Keep the CLK always-ON

Why? Presumably to make sure we can access the lpass sysnoc path all the
time?

> +        * LPASS_AUDIO_CORE_SYSNOC_SWAY_CORE_CLK
> +        */
> +       regmap_update_bits(regmap, 0x24000, BIT(0), BIT(0));
> +
> +       /* PLL settings */
> +       regmap_write(regmap, 0x1008, 0x20);
> +       regmap_update_bits(regmap, 0x1014, BIT(0), BIT(0));
> +
> +       clk_fabia_pll_configure(&lpass_lpaaudio_dig_pll, regmap,
> +                               &lpass_lpaaudio_dig_pll_config);
> +
> +       return qcom_cc_really_probe(pdev, &lpass_core_cc_sc7180_desc, reg=
map);
> +}
> +
> +static int lpass_hm_core_probe(struct platform_device *pdev)
> +{
> +       const struct qcom_cc_desc *desc;
> +       int ret;
> +
> +       lpass_core_cc_sc7180_regmap_config.name =3D "lpass_hm_core";
> +       desc =3D &lpass_core_hm_sc7180_desc;
> +
> +       return qcom_cc_probe_by_index(pdev, 0, desc);
> +}
> +
> +static const struct of_device_id lpass_core_cc_sc7180_match_table[] =3D {
> +       {
> +               .compatible =3D "qcom,sc7180-lpasshm",
> +               .data =3D lpass_hm_core_probe,
> +       },
> +       {
> +               .compatible =3D "qcom,sc7180-lpasscorecc",
> +               .data =3D lpass_core_cc_sc7180_probe,
> +       },
> +       { }
> +};
> +MODULE_DEVICE_TABLE(of, lpass_core_cc_sc7180_match_table);
> +
> +static int lpass_core_sc7180_probe(struct platform_device *pdev)
> +{
> +       int (*clk_probe)(struct platform_device *p);
> +       int ret;
> +
> +       pm_runtime_enable(&pdev->dev);
> +       ret =3D pm_clk_create(&pdev->dev);
> +       if (ret)
> +               return ret;
> +
> +       ret =3D pm_clk_add(&pdev->dev, "gcc_lpass_sway");
> +       if (ret < 0) {
> +               dev_err(&pdev->dev, "failed to acquire iface clock\n");

Can the clk name be 'iface' if it's actually the interface clk?
"gcc_lpass_sway" looks to be the actual clk name which we shouldn't care
about here. It should be whatever clk name we consider it to be, which
would mean iface probably.

> +               goto disable_pm_runtime;
> +       }
> +
> +       clk_probe =3D of_device_get_match_data(&pdev->dev);
> +       if (!clk_probe)
> +               return -EINVAL;
> +
> +       ret =3D clk_probe(pdev);
> +       if (ret)
> +               goto destroy_pm_clk;
> +
> +       return 0;