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[23.128.96.18]) by mx.google.com with ESMTP id bo6si1699299edb.586.2020.05.27.08.46.33; Wed, 27 May 2020 08:46:56 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=E1buh6nf; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727087AbgE0LvD (ORCPT + 99 others); Wed, 27 May 2020 07:51:03 -0400 Received: from mail.kernel.org ([198.145.29.99]:43952 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725922AbgE0LvC (ORCPT ); Wed, 27 May 2020 07:51:02 -0400 Received: from willie-the-truck (236.31.169.217.in-addr.arpa [217.169.31.236]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 8844D207CB; Wed, 27 May 2020 11:51:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1590580262; bh=O1IhXKvulbbaTb2S/qFZhvTkhhxiyeByusPSy3+8X+c=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=E1buh6nfWyw2le+sjPSU+ott8HqQvdvVr4k55F/24YH+2Mg3djenF6k1RWcxZRdu2 iaZCV9jtLzNmgZlVa35PVbmIgBeGQo2IYJQEnE4ZkwZMbuvxl66+NhiVnuj2PRFhkr JWVKJWksIVBkUn2TYQYr8NFTrB38H+2fYJfcpHwk= Date: Wed, 27 May 2020 12:50:58 +0100 From: Will Deacon To: Tuan Phan Cc: patches@amperecomputing.com, Mark Rutland , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v2] driver/perf: Add PMU driver for the ARM DMC-620 memory controller. Message-ID: <20200527115057.GB13795@willie-the-truck> References: <1589229894-18863-1-git-send-email-tuanphan@os.amperecomputing.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1589229894-18863-1-git-send-email-tuanphan@os.amperecomputing.com> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, May 11, 2020 at 01:44:52PM -0700, Tuan Phan wrote: > DMC-620 PMU supports 10 total counters that are independently > programmable for different events and can be individually started and > stopped. > > ACPI is only supported; device tree support is welcomed to be added and > tested for other platforms. > > Usage example: > #perf stat -e arm_dmc620_10008c000/clk_cycle_count/ -C 0 > Get perf event for clk_cycle_count counter. > > #perf stat -e arm_dmc620_10008c000/clkdiv2_allocate,mask=0x1f,match=0x2f, > incr=2,invert=1/ -C 0 > The above example shows how to specify mask, match, incr, > invert parameters for clkdiv2_allocate event. > > Signed-off-by: Tuan Phan > --- > Changes in v2: > - Removed IRQF_SHARED flag and added support for multiple > PMUs sharing the same interrupt. > - Fixed an interrupt handler race condition. > > The ACPI binding spec for PMU DMC620 is under beta and located > in ARM server group under project "ACPI on ARM". > > drivers/perf/Kconfig | 8 + > drivers/perf/Makefile | 1 + > drivers/perf/arm_dmc620_pmu.c | 869 ++++++++++++++++++++++++++++++++++++++++++ > 3 files changed, 878 insertions(+) > create mode 100644 drivers/perf/arm_dmc620_pmu.c Given that this is Arm IP, it would be nice to have a review from somebody at Arm. I have vague recollections of an internal DMC PMU driver too, but I don't remember the details. Will