Received: by 2002:a25:ef43:0:0:0:0:0 with SMTP id w3csp823274ybm; Wed, 27 May 2020 08:51:21 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwyMtnK/eMs8Dh7+W11R0MD+keI0jQaVuJUnCAG3YqlNMokwvHRxnUCkPehBh/VhmeC9EmP X-Received: by 2002:a05:6402:17c7:: with SMTP id s7mr2285401edy.57.1590594681256; Wed, 27 May 2020 08:51:21 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1590594681; cv=none; d=google.com; s=arc-20160816; b=Thgm3CxRy2txsw9KWv7Vkk42T/dZv6ySEMmH3/UEQCyqS4b7M1LFe56EwHlD4Zzm09 o9Io/PlZv38bxewDTI0Pv8PVs+k9kqAEdGGEJQtKkf+lDAm9xHFtq5KKsGNU5wFa+PvV ryp35pF3459Ly7g/GU1Hlvri1vo/IlWx4lVVEAZaLDP0pt6Fn9GMy9ROsCZt5sHblvQX KNKkgMzx9ulVcq8Sjp0dtNTjDJAbFTWyXE/6k/6G5o4rvDUBo60lodL/q8SZbzhRYeYy d2DoyhW3fzNEzr8k4+kvv52zy101zIG6eWPAX7s7LLtx5Q2eqXwixUX/k4mjQXrEbFyE 1M1g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-language :content-transfer-encoding:in-reply-to:mime-version:user-agent:date :message-id:from:references:cc:to:subject:dmarc-filter :dkim-signature; bh=a0pH7dQyq4r9sJKjE/07Ll+1aMct4+PM140OnxeMnLs=; b=DPZir74cPYJTLRaYSULyPqh+YB2DP1KL3szr4KWOexh64myYiYKNb4Sh9RM4HXpL1n UO7SGeIpjZMeCL7QVwI1c1nszUILFMgkEmxNlqSB3JAd4F1WtjdTwtoV4BV4fpEF65zs VeH+WXlNX075fAQONID8fhlJmqGqSYdrfrLoyV2slmzQZuuuTWBlWr+5F3UtA4QMkOgD XFa9BkKESsWNnJryAwkfqhK0bZWtA9Z0H+heQi6F+A1eyBUsff9/3Rr98/ofLucNrecX hfZmrdeL2MGaEkN791thwl9jOhI3UK6yvqS5m2Q38YJjlZYBvaPSvzobCgOYnI4Mb37e 4jWg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@mg.codeaurora.org header.s=smtp header.b=pq4xIGDT; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id qu5si2020657ejb.365.2020.05.27.08.50.58; Wed, 27 May 2020 08:51:21 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=fail header.i=@mg.codeaurora.org header.s=smtp header.b=pq4xIGDT; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730053AbgE0MbV (ORCPT + 99 others); Wed, 27 May 2020 08:31:21 -0400 Received: from m43-7.mailgun.net ([69.72.43.7]:61069 "EHLO m43-7.mailgun.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728859AbgE0MbU (ORCPT ); Wed, 27 May 2020 08:31:20 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1590582679; h=Content-Transfer-Encoding: Content-Type: In-Reply-To: MIME-Version: Date: Message-ID: From: References: Cc: To: Subject: Sender; bh=a0pH7dQyq4r9sJKjE/07Ll+1aMct4+PM140OnxeMnLs=; b=pq4xIGDTC0pmWziE1GUOkgmB9US0n26AwnYFR3CFNY0fb9WIS/D80QZBPrzRbD3cBmBKE7AL IAObgdGvrP288HncUA62n1TRypMylMqvX2E5yFfAiQBCmB9M3kaTsN0Fks/oGdExton+I4H0 Seiv9bK+Quayuv6S15gWHEHhUPc= X-Mailgun-Sending-Ip: 69.72.43.7 X-Mailgun-Sid: WyI0MWYwYSIsICJsaW51eC1rZXJuZWxAdmdlci5rZXJuZWwub3JnIiwgImJlOWU0YSJd Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n03.prod.us-east-1.postgun.com with SMTP id 5ece5d8d2738686126ff3b55 (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Wed, 27 May 2020 12:31:09 GMT Received: by smtp.codeaurora.org (Postfix, from userid 1001) id A6182C43391; Wed, 27 May 2020 12:31:08 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-caf-mail-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.0 required=2.0 tests=ALL_TRUSTED,SPF_NONE autolearn=unavailable autolearn_force=no version=3.4.0 Received: from [192.168.43.129] (unknown [106.222.1.206]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: mkshah) by smtp.codeaurora.org (Postfix) with ESMTPSA id 85F4BC433C6; Wed, 27 May 2020 12:31:00 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 85F4BC433C6 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=none smtp.mailfrom=mkshah@codeaurora.org Subject: Re: [PATCH v2 3/4] pinctrl: qcom: Add msmgpio irqchip flags To: Stephen Boyd , bjorn.andersson@linaro.org, evgreen@chromium.org, linus.walleij@linaro.org, maz@kernel.org, mka@chromium.org Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, agross@kernel.org, tglx@linutronix.de, jason@lakedaemon.net, dianders@chromium.org, rnayak@codeaurora.org, ilina@codeaurora.org, lsrao@codeaurora.org References: <1590253873-11556-1-git-send-email-mkshah@codeaurora.org> <1590253873-11556-4-git-send-email-mkshah@codeaurora.org> <159057285160.88029.12486371130122290394@swboyd.mtv.corp.google.com> From: Maulik Shah Message-ID: <65c86165-5956-5340-1f40-6426c6aec743@codeaurora.org> Date: Wed, 27 May 2020 18:00:57 +0530 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:68.0) Gecko/20100101 Thunderbird/68.8.0 MIME-Version: 1.0 In-Reply-To: <159057285160.88029.12486371130122290394@swboyd.mtv.corp.google.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Content-Language: en-GB Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On 5/27/2020 3:17 PM, Stephen Boyd wrote: > Quoting Maulik Shah (2020-05-23 10:11:12) >> Add irqchip specific flags for msmgpio irqchip to mask non wakeirqs >> during suspend and mask before setting irq type. > Why do we need to mask before setting irq type? Does something go wrong? > Can you explain in the commit text? i don't think anything goes wrong but there might be a case where some driver changing type at runtime, masking before changing type should make sure any spurious interrupt is not detected during this operation. > >> Signed-off-by: Maulik Shah > Does this need a Fixes tag? Thanks i will add. > >> --- >> drivers/pinctrl/qcom/pinctrl-msm.c | 2 ++ >> 1 file changed, 2 insertions(+) >> >> diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c >> index 2419023..b909ffe 100644 >> --- a/drivers/pinctrl/qcom/pinctrl-msm.c >> +++ b/drivers/pinctrl/qcom/pinctrl-msm.c >> @@ -1143,6 +1143,8 @@ static int msm_gpio_init(struct msm_pinctrl *pctrl) >> pctrl->irq_chip.irq_release_resources = msm_gpio_irq_relres; >> pctrl->irq_chip.irq_set_affinity = msm_gpio_irq_set_affinity; >> pctrl->irq_chip.irq_set_vcpu_affinity = msm_gpio_irq_set_vcpu_affinity; >> + pctrl->irq_chip.flags = IRQCHIP_MASK_ON_SUSPEND > This is sort of sad. We have to set the IRQCHIP_MASK_ON_SUSPEND flag > here so that genirq can call the mask op during suspend for the parent > irqchip (pdc)? During suspend, suspend_device_irq() will check this flag in msmgpio irqchip and then call it to mask if its not marked for wakeup. in this case, setting this flag will call first invoke gpiolib's callback  (we override in first patch of this series), then it goes to msmgpio chip's mask callback, this call will then get forwarded to its parent PDC and then to PDC's parent GIC. This seems the way hierarchical irqchip works. i don't see any issue with this. > Is there some way to not need to do that and instead let > genirq do mask on suspend at the chip level instead of the irq level? > >> + | IRQCHIP_SET_TYPE_MASKED; >> >> np = of_parse_phandle(pctrl->dev->of_node, "wakeup-parent", 0); >> if (np) { -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation