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Signed-off-by: Maxime Ripard --- drivers/gpu/drm/vc4/vc4_crtc.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c index fd248ee546e8..8dbf06cdb069 100644 --- a/drivers/gpu/drm/vc4/vc4_crtc.c +++ b/drivers/gpu/drm/vc4/vc4_crtc.c @@ -44,6 +44,8 @@ #include "vc4_drv.h" #include "vc4_regs.h" +#define HVS_FIFO_LATENCY_PIX 6 + #define CRTC_WRITE(offset, val) writel(val, vc4_crtc->regs + (offset)) #define CRTC_READ(offset) readl(vc4_crtc->regs + (offset)) @@ -231,18 +233,17 @@ vc4_crtc_update_gamma_lut(struct drm_crtc *crtc) static u32 vc4_get_fifo_full_level(u32 format) { static const u32 fifo_len_bytes = 64; - static const u32 hvs_latency_pix = 6; switch (format) { case PV_CONTROL_FORMAT_DSIV_16: case PV_CONTROL_FORMAT_DSIC_16: - return fifo_len_bytes - 2 * hvs_latency_pix; + return fifo_len_bytes - 2 * HVS_FIFO_LATENCY_PIX; case PV_CONTROL_FORMAT_DSIV_18: return fifo_len_bytes - 14; case PV_CONTROL_FORMAT_24: case PV_CONTROL_FORMAT_DSIV_24: default: - return fifo_len_bytes - 3 * hvs_latency_pix; + return fifo_len_bytes - 3 * HVS_FIFO_LATENCY_PIX; } } -- git-series 0.9.1