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[23.128.96.18]) by mx.google.com with ESMTP id k19si1178261edj.180.2020.05.27.12.00.03; Wed, 27 May 2020 12:00:27 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@cerno.tech header.s=fm2 header.b=yGj2WBWf; dkim=pass header.i=@messagingengine.com header.s=fm2 header.b=C5KeHyMO; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=cerno.tech Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390231AbgE0PvA (ORCPT + 98 others); Wed, 27 May 2020 11:51:00 -0400 Received: from new1-smtp.messagingengine.com ([66.111.4.221]:59645 "EHLO new1-smtp.messagingengine.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730574AbgE0Pug (ORCPT ); Wed, 27 May 2020 11:50:36 -0400 Received: from compute4.internal (compute4.nyi.internal [10.202.2.44]) by mailnew.nyi.internal (Postfix) with ESMTP id 24771582091; Wed, 27 May 2020 11:50:35 -0400 (EDT) Received: from mailfrontend2 ([10.202.2.163]) by compute4.internal (MEProxy); Wed, 27 May 2020 11:50:35 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cerno.tech; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; s=fm2; bh=hn1mG4jcbIIbo 0o9ITAXWH7T5+mqDrg6shUmeSL5Ixs=; b=yGj2WBWf7aNTKqe1XIdQP4IugcG9G TuzE15VYtv8mLN71gqg4eV581al6ajI26dzIllgwH27l3dnkV+2BaP1f9IR+rnor DU7qpFnW0P5kgua31cubGUsyTCeoRQSIt4YyaMelcQkzgnnohDQtuFYjBHsgVD7G ikup90t+Cu+pC+5N3/QRUOZPoHaV5tiBDWPl4ujvSvCkNfOrcqKz75MjPXpLycz6 Capu3XGBShRlvZuU9gTUxktRy7MgcvZj4ldZwrn1ks+aNXDuWbBmO2xYjGAldHkD jik0JVaEEUtKaPbJXlaKtG5If3HJOgSPE2HJRd9lXWx5AaoZFaiCNO14Q== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:date:from :in-reply-to:message-id:mime-version:references:subject:to :x-me-proxy:x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s= fm2; bh=hn1mG4jcbIIbo0o9ITAXWH7T5+mqDrg6shUmeSL5Ixs=; b=C5KeHyMO TOkvrTlxF/7oCvfP3SWDCIWcAEREFST4OiTEdFsZA0p7TaczWuc72n008+yJBISr aKsYXfYKCYbk/yiOpWCEs83P9JCwmd+DLpXYQ7cABrv8s6O1NMRqiEmK0QLBBkFC xCB69EglMkj2r3PGVtP5Fkcu2rteC5KKVu5Fe0eOfE21GkK3Iqg89XHftbeRDnVO OmB4Oi99OmXEBub/5GpLsoDBbFXiZ/ir28g6bJZXGptyX6GXdqtxtywVUX5fvvNL TxXhK2CgEvq54RoQrrL69yAe4ydssNVzFmUpP7M8a/wDJ2n/2/YkiE4taGBEfNQi ceGKr3ZvL121Jw== X-ME-Sender: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeduhedruddvgedgkeegucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvufffkffojghfggfgsedtkeertdertddtnecuhfhrohhmpeforgigihhm vgcutfhiphgrrhguuceomhgrgihimhgvsegtvghrnhhordhtvggthheqnecuggftrfgrth htvghrnhepvdekleevfeffkeejhfffueelteelfeduieefheduudfggffhhfffheevveeh hedvnecukfhppeeltddrkeelrdeikedrjeeinecuvehluhhsthgvrhfuihiivgepvdelne curfgrrhgrmhepmhgrihhlfhhrohhmpehmrgigihhmvgestggvrhhnohdrthgvtghh X-ME-Proxy: Received: from localhost (lfbn-tou-1-1502-76.w90-89.abo.wanadoo.fr [90.89.68.76]) by mail.messagingengine.com (Postfix) with ESMTPA id B3C2D306218B; Wed, 27 May 2020 11:50:34 -0400 (EDT) From: Maxime Ripard To: Nicolas Saenz Julienne , Eric Anholt Cc: dri-devel@lists.freedesktop.org, linux-rpi-kernel@lists.infradead.org, bcm-kernel-feedback-list@broadcom.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Dave Stevenson , Tim Gover , Phil Elwell , Maxime Ripard Subject: [PATCH v3 049/105] drm/vc4: crtc: Move HVS channel init before the PV initialisation Date: Wed, 27 May 2020 17:48:19 +0200 Message-Id: <04fdaf2379fbb315a1e73d44139e9205490e7a6b.1590594512.git-series.maxime@cerno.tech> X-Mailer: git-send-email 2.26.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org In order to avoid stale pixels getting stuck in an intermediate FIFO between the HVS and the pixelvalve on BCM2711, we need to configure the HVS channel before the pixelvalve is reset and configured. Signed-off-by: Maxime Ripard --- drivers/gpu/drm/vc4/vc4_crtc.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c index 3c9b0d684136..83fb5ba19b43 100644 --- a/drivers/gpu/drm/vc4/vc4_crtc.c +++ b/drivers/gpu/drm/vc4/vc4_crtc.c @@ -433,11 +433,6 @@ static void vc4_crtc_atomic_enable(struct drm_crtc *crtc, require_hvs_enabled(dev); - if (!vc4_state->feed_txp) - vc4_crtc_config_pv(crtc); - - CRTC_WRITE(PV_CONTROL, CRTC_READ(PV_CONTROL) | PV_CONTROL_EN); - /* Enable vblank irq handling before crtc is started otherwise * drm_crtc_get_vblank() fails in vc4_crtc_update_dlist(). */ @@ -445,6 +440,11 @@ static void vc4_crtc_atomic_enable(struct drm_crtc *crtc, vc4_hvs_atomic_enable(crtc, old_state); + if (!vc4_state->feed_txp) + vc4_crtc_config_pv(crtc); + + CRTC_WRITE(PV_CONTROL, CRTC_READ(PV_CONTROL) | PV_CONTROL_EN); + /* When feeding the transposer block the pixelvalve is unneeded and * should not be enabled. */ -- git-series 0.9.1