Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18;
Date:   Wed, 27 May 2020 15:46:54 -0700
Message-Id: <20200527224659.206129-1-eranian@google.com>
Mime-Version: 1.0
Subject: [PATCH v2 0/5] perf/x86/rapl: Enable RAPL for AMD Fam17h
From:   Stephane Eranian <eranian@google.com>
To:     linux-kernel@vger.kernel.org
Cc:     peterz@infradead.org, mingo@elte.hu, irogers@google.com,
        kim.phillips@amd.com, jolsa@redhat.com
Content-Type: text/plain; charset="UTF-8"
Sender: linux-kernel-owner@vger.kernel.org
Precedence: bulk

This patch series adds support for AMD Fam17h RAPL counters. As per
AMD PPR, Fam17h support Package RAPL counters to monitor power usage.
The RAPL counter operates as with Intel RAPL. As such, it is beneficial
to share the code.

The series first moves the rapl.c file to common perf_events x86 and then
adds the support.
From the user's point of view, the interface is identical with
/sys/devices/power. The energy-pkg event is the only one supported.

$ perf stat -a --per-socket -I 1000 -e power/energy-pkg/

In V2, we integrated Peter's comments:
- keep the same CONFIG_PERF_EVENTS_INTEL_RAPL for both Intel and AMD support
- msr is unsigned int
- cleanup initialization of the *_rapl_msrs[] arrays

In particular, we split the patch some more to clearly identify the changes.
We flip the visibility logic to work around the behavior of perf_msr_probe().
We improve that function to handle msrs[] array with unpopulated entries.
This help RAPL on AMD, because only one MSR (PKG) is define. That way
we can initialize the amd_rapl_msrs[] array just with that entry. But because
we prefer having the same encoding for the same RAPL event between AMD and Intel
this means, we need to handle unpopulated entries in the array and in perf_msr_probe()
which is what patch 4 does.

Signed-off-by: Stephane Eranian <eranian@google.com>


Stephane Eranian (5):
  perf/x86/rapl: move RAPL support to common x86 code
  perf/x86/rapl: refactor code for Intel/AMD sharing
  perf/x86/rapl: flip logic on default events visibility
  perf/x86: make perf_probe_msr() more robust and flexible
  perf/x86/rapl: add AMD Fam17h RAPL support

 arch/x86/events/Kconfig            |  6 +--
 arch/x86/events/Makefile           |  1 +
 arch/x86/events/intel/Makefile     |  2 -
 arch/x86/events/probe.c            | 13 ++++++
 arch/x86/events/{intel => }/rapl.c | 67 ++++++++++++++++++++++++++----
 arch/x86/include/asm/msr-index.h   |  3 ++
 6 files changed, 78 insertions(+), 14 deletions(-)
 rename arch/x86/events/{intel => }/rapl.c (92%)

-- 
2.27.0.rc0.183.gde8f92d652-goog