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Date:   Fri, 29 May 2020 14:10:56 +1000
From:   Stephen Rothwell <sfr@canb.auug.org.au>
To:     Rob Clark <robdclark@gmail.com>, Sean Paul <seanpaul@chromium.org>
Cc:     Linux Next Mailing List <linux-next@vger.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
        Kalyan Thota <kalyan_t@codeaurora.org>
Subject: Re: inux-next: build failure after merge of the drm-msm tree
Message-ID: <20200529141056.000f78ba@canb.auug.org.au>
In-Reply-To: <20200526140841.0a1d5c7b@canb.auug.org.au>
References: <20200519150955.1667566a@canb.auug.org.au>
        <20200526140841.0a1d5c7b@canb.auug.org.au>
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Hi all,

On Tue, 26 May 2020 14:08:41 +1000 Stephen Rothwell <sfr@canb.auug.org.au> =
wrote:
>
> Hi all,
>=20
> On Tue, 19 May 2020 15:09:55 +1000 Stephen Rothwell <sfr@canb.auug.org.au=
> wrote:
> >
> > Hi all,
> >=20
> > After merging the drm-msm tree, today's linux-next build (arm
> > multi_v7_defconfig) failed like this:
> >=20
> > ERROR: modpost: "__aeabi_ldivmod" [drivers/gpu/drm/msm/msm.ko] undefine=
d!
> > ERROR: modpost: "__aeabi_uldivmod" [drivers/gpu/drm/msm/msm.ko] undefin=
ed!
> >=20
> > Caused by commit
> >=20
> >   04d9044f6c57 ("drm/msm/dpu: add support for clk and bw scaling for di=
splay")
> >=20
> > I applied the following patch for today (this is mechanical, there may
> > be a better way):
> >=20
> > From: Stephen Rothwell <sfr@canb.auug.org.au>
> > Date: Tue, 19 May 2020 14:12:39 +1000
> > Subject: [PATCH] drm/msm/dpu: fix up u64/u32 division for 32 bit archit=
ectures
> >=20
> > Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
> > ---
> >  drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 23 ++++++++++++++-----
> >  drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c     | 15 ++++++++----
> >  2 files changed, 28 insertions(+), 10 deletions(-)
> >=20
> > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c b/drivers/gp=
u/drm/msm/disp/dpu1/dpu_core_perf.c
> > index 9697abcbec3f..85c2a4190840 100644
> > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
> > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
> > @@ -10,6 +10,7 @@
> >  #include <linux/sort.h>
> >  #include <linux/clk.h>
> >  #include <linux/bitmap.h>
> > +#include <asm/div64.h>
> > =20
> >  #include "dpu_kms.h"
> >  #include "dpu_trace.h"
> > @@ -53,8 +54,11 @@ static u64 _dpu_core_perf_calc_bw(struct dpu_kms *km=
s,
> >  	}
> > =20
> >  	bw_factor =3D kms->catalog->perf.bw_inefficiency_factor;
> > -	if (bw_factor)
> > -		crtc_plane_bw =3D mult_frac(crtc_plane_bw, bw_factor, 100);
> > +	if (bw_factor) {
> > +		u64 quot =3D crtc_plane_bw;
> > +		u32 rem =3D do_div(quot, 100);
> > +		crtc_plane_bw =3D (quot * bw_factor) + ((rem * bw_factor) / 100);
> > +	}
> > =20
> >  	return crtc_plane_bw;
> >  }
> > @@ -89,8 +93,11 @@ static u64 _dpu_core_perf_calc_clk(struct dpu_kms *k=
ms,
> >  	}
> > =20
> >  	clk_factor =3D kms->catalog->perf.clk_inefficiency_factor;
> > -	if (clk_factor)
> > -		crtc_clk =3D mult_frac(crtc_clk, clk_factor, 100);
> > +	if (clk_factor) {
> > +		u64 quot =3D crtc_clk;
> > +		u32 rem =3D do_div(quot, 100);
> > +		crtc_clk =3D (quot * clk_factor) + ((rem * clk_factor) / 100);
> > +	}
> > =20
> >  	return crtc_clk;
> >  }
> > @@ -234,8 +241,12 @@ static int _dpu_core_perf_crtc_update_bus(struct d=
pu_kms *kms,
> >  		}
> >  	}
> > =20
> > -	avg_bw =3D kms->num_paths ?
> > -			perf.bw_ctl / kms->num_paths : 0;
> > +	if (kms->num_paths) {
> > +		avg_bw =3D perf.bw_ctl;
> > +		do_div(avg_bw, kms->num_paths);
> > +	} else {
> > +		avg_bw =3D 0;
> > +	}
> > =20
> >  	for (i =3D 0; i < kms->num_paths; i++)
> >  		icc_set_bw(kms->path[i],
> > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/dr=
m/msm/disp/dpu1/dpu_plane.c
> > index c2a6e3dacd68..ad95f32eac13 100644
> > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
> > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
> > @@ -9,6 +9,7 @@
> > =20
> >  #include <linux/debugfs.h>
> >  #include <linux/dma-buf.h>
> > +#include <asm/div64.h>
> > =20
> >  #include <drm/drm_atomic_uapi.h>
> >  #include <drm/drm_damage_helper.h>
> > @@ -174,7 +175,11 @@ static void _dpu_plane_calc_bw(struct drm_plane *p=
lane,
> >  	plane_prefill_bw =3D
> >  		src_width * hw_latency_lines * fps * fmt->bpp * scale_factor;
> > =20
> > -	plane_prefill_bw =3D mult_frac(plane_prefill_bw, mode->vtotal, (vbp+v=
pw));
> > +	{
> > +		u64 quot =3D plane_prefill_bw;
> > +		u32 rem =3D do_div(plane_prefill_bw, vbp + vpw);
> > +		plane_prefill_bw =3D quot * mode->vtotal + rem * mode->vtotal / (vbp=
 + vpw);
> > +	}
> > =20
> >  	pstate->plane_fetch_bw =3D max(plane_bw, plane_prefill_bw);
> >  }
> > @@ -204,9 +209,11 @@ static void _dpu_plane_calc_clk(struct drm_plane *=
plane)
> >  	pstate->plane_clk =3D
> >  		dst_width * mode->vtotal * fps;
> > =20
> > -	if (src_height > dst_height)
> > -		pstate->plane_clk =3D mult_frac(pstate->plane_clk,
> > -					src_height, dst_height);
> > +	if (src_height > dst_height) {
> > +		u64 quot =3D pstate->plane_clk;
> > +		u32 rem =3D do_div(quot, dst_height);
> > +		pstate->plane_clk =3D quot * src_height + rem * src_height / dst_hei=
ght;
> > +	}
> >  }
> > =20
> >  /**
> > --=20
> > 2.26.2 =20
>=20
> I am still applying the above ...

Still applying.

Any comment even?
--=20
Cheers,
Stephen Rothwell

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