Received: by 2002:a25:ef43:0:0:0:0:0 with SMTP id w3csp627460ybm; Fri, 29 May 2020 08:21:52 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxW4hIHZxgsq9yb9Haxybru1DuD4VQ5BojWok4TDIoGtlcgfgxX7MJsZBYtKA97tC123xbO X-Received: by 2002:a17:906:653:: with SMTP id t19mr7932706ejb.346.1590765712034; Fri, 29 May 2020 08:21:52 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1590765712; cv=none; d=google.com; s=arc-20160816; b=QR2GA87aJMbfjZob5VKb3HKk08SqMzQLpk4qoMNoOOfCyjbp7jXH+Q3ESw7rG27MAV O5hmsy6FvUmHHX0lpyL0lram0jqfBmNCfnKNNJ9wWN1FZe1Vca8jKLEvBcCGD8acu5/0 EO72TVSMCNmE0GRcay6hjUmRY7gPP8gD03xC5PbnjXmcXAMdnBfkDN6+3VtTTMRYRK5n 1PmJEL9YfDLwwxl/FvKwpB/SW0Qh+YLBKzof915cW3weZMNqXnAYVlbt89aJmeNuBkJ5 8BhsLRit+YnpQAEpdmsVMt9kQeknpAlOw3aGUkKdt7xIVLzDURExNi5PeKsG7aVlGpPU 7m4A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=sXSSwzUY45Tzam9RmLSgT3NUjnL8G0U3TkqO4f30tyg=; b=kPLk6o2OTg4TPlu/opyUJeYIx6Tbo518s0f93sGkgpC/uuVwbTczJ3JtIZSdbpjM78 fFzGbx6yprGTLzeqPr+qsZVdA6p/G1LPefVTLmwopYlFo3ddpldqt12YmYYDdToilQJH MknlrKyRuOU5xamAThFs3PlIHWw8/4QopN50PDZPQNabwxORwWWCb1w4rbcVl9075vN6 UBjbvMHkIZb0dCruaf+paboELDDYxbCAuHripdA2VTv50EvgVSyclYlq1KcfyTy1Xh0Y aJr11SjFkVNCYr2Z5i4utEq59LEMpSogt0FUcMYEEnr1AjQqklX/ykbAmsugdoxo/hW2 PFOQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=INoEBYRJ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id m10si5513364edv.322.2020.05.29.08.21.27; Fri, 29 May 2020 08:21:52 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=INoEBYRJ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727024AbgE2PTp (ORCPT + 99 others); Fri, 29 May 2020 11:19:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48284 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725901AbgE2PTn (ORCPT ); Fri, 29 May 2020 11:19:43 -0400 Received: from mail-wr1-x443.google.com (mail-wr1-x443.google.com [IPv6:2a00:1450:4864:20::443]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AFF74C03E969 for ; Fri, 29 May 2020 08:19:42 -0700 (PDT) Received: by mail-wr1-x443.google.com with SMTP id s8so4033412wrt.9 for ; Fri, 29 May 2020 08:19:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=sXSSwzUY45Tzam9RmLSgT3NUjnL8G0U3TkqO4f30tyg=; b=INoEBYRJKiMBcRrdZ3KCtef6ctCTf7ko+wPETDhQXfSBRDUtY3RmXq6uLNHQOOGOHE FDvV+0mztVlS32ktvbFoWLb+GHgr1Oval/z31sxOUsIxyo/Ieeer2W2G+/kQ9OnoT4bj As57P/V55olt1ZRAz3QKnJrwBZ3e0/OD8RS2x8Vfn3jHJYUQ2rsuZSx3vMA/lkqOG81L sbypwrtsGnrL3ikncYB6OtFX8OIK4ycgQHzxQzkZzNHPnBnVEPYv3Vr2JAQPpJ0emVXp JKQ+ZTGHN4KfR50TQy8zAnP3GAS3aTl7Wbq9yCjX2L5h0SMr//ex24uLLtyeIqMWKZJf YCdQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=sXSSwzUY45Tzam9RmLSgT3NUjnL8G0U3TkqO4f30tyg=; b=I8m8BsqlPUYNbjS4aijN3fkQi8iUyiujiSs4NGJqrqFRmRW0of8nVDiIXhJr+oEA4j SNLwXl5R9iux7yfITtDABuxTFL8GlEOe+7NR9rUqXfepCXR2oa8HYDE1sIdU5ETkoIsn 0gsPfMxvPaklXy6prsMgU2y1ssSIF9Lo9uE6rFlot/TKBZgl+1d1KgxtbF6KeORKr22C 8m08VlQFUMR8fQ6v08wVrKPzwsgL0iAGs2IhOsa2qq3Q6iIwW/W6MZ3Q9FN7PIDv8/mn w5RhE9eFOArLaFGj/19r4Q8hLMuuwbGovaqg6QDGufDL+BrTMR7I6olbxuKRF4VqPUTc qEuA== X-Gm-Message-State: AOAM530QbsowGvTlLUCeLXf+Ehrz3ga/yiKVzy/ENRvQzLKCA2EFVZ2+ zD4gLeiPen5Ws9T5tcNzqXqUjA== X-Received: by 2002:adf:dfcf:: with SMTP id q15mr8920904wrn.373.1590765581283; Fri, 29 May 2020 08:19:41 -0700 (PDT) Received: from localhost.localdomain ([2a01:e35:2ec0:82b0:acf8:18a8:b3a5:a17b]) by smtp.gmail.com with ESMTPSA id x66sm9220421wmb.40.2020.05.29.08.19.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 29 May 2020 08:19:40 -0700 (PDT) From: Neil Armstrong To: daniel@ffwll.ch, dri-devel@lists.freedesktop.org Cc: Neil Armstrong , linux-amlogic@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Kevin Hilman Subject: [PATCH v7 1/6] drm/fourcc: Add modifier definitions for describing Amlogic Video Framebuffer Compression Date: Fri, 29 May 2020 17:19:30 +0200 Message-Id: <20200529151935.13418-2-narmstrong@baylibre.com> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20200529151935.13418-1-narmstrong@baylibre.com> References: <20200529151935.13418-1-narmstrong@baylibre.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Amlogic uses a proprietary lossless image compression protocol and format for their hardware video codec accelerators, either video decoders or video input encoders. It considerably reduces memory bandwidth while writing and reading frames in memory. The underlying storage is considered to be 3 components, 8bit or 10-bit per component, YCbCr 420, single plane : - DRM_FORMAT_YUV420_8BIT - DRM_FORMAT_YUV420_10BIT This modifier will be notably added to DMA-BUF frames imported from the V4L2 Amlogic VDEC decoder. This introduces the basic layout composed of: - a body content organized in 64x32 superblocks with 4096 bytes per superblock in default mode. - a 32 bytes per 128x64 header block This layout is tranferrable between Amlogic SoCs supporting this modifier. The Memory Saving option exist changing the layout superblock size to save memory when using 8bit components pixels size. Finally is also adds the Scatter Memory layout, meaning the header contains IOMMU references to the compressed frames content to optimize memory access and layout. In this mode, only the header memory address is needed, thus the content memory organization is tied to the current producer execution and cannot be saved/dumped neither transferrable between Amlogic SoCs supporting this modifier. Tested-by: Kevin Hilman Signed-off-by: Neil Armstrong --- include/uapi/drm/drm_fourcc.h | 74 +++++++++++++++++++++++++++++++++++ 1 file changed, 74 insertions(+) diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h index 9e488d10f8b4..f7692fa2d32d 100644 --- a/include/uapi/drm/drm_fourcc.h +++ b/include/uapi/drm/drm_fourcc.h @@ -309,6 +309,7 @@ extern "C" { #define DRM_FORMAT_MOD_VENDOR_BROADCOM 0x07 #define DRM_FORMAT_MOD_VENDOR_ARM 0x08 #define DRM_FORMAT_MOD_VENDOR_ALLWINNER 0x09 +#define DRM_FORMAT_MOD_VENDOR_AMLOGIC 0x0a /* add more to the end as needed */ @@ -810,6 +811,79 @@ extern "C" { */ #define DRM_FORMAT_MOD_ALLWINNER_TILED fourcc_mod_code(ALLWINNER, 1) +/* + * Amlogic Video Framebuffer Compression modifiers + * + * Amlogic uses a proprietary lossless image compression protocol and format + * for their hardware video codec accelerators, either video decoders or + * video input encoders. + * + * It considerably reduces memory bandwidth while writing and reading + * frames in memory. + * + * The underlying storage is considered to be 3 components, 8bit or 10-bit + * per component YCbCr 420, single plane : + * - DRM_FORMAT_YUV420_8BIT + * - DRM_FORMAT_YUV420_10BIT + * + * The first 8 bits of the mode defines the layout, then the following 8 bits + * defines the options changing the layout. + * + * Not all combinations are valid, and different SoCs may support different + * combinations of layout and options. + */ +#define __fourcc_mod_amlogic_layout_mask 0xf +#define __fourcc_mod_amlogic_options_shift 8 +#define __fourcc_mod_amlogic_options_mask 0xf + +#define DRM_FORMAT_MOD_AMLOGIC_FBC(__layout, __options) \ + fourcc_mod_code(AMLOGIC, \ + ((__layout) & __fourcc_mod_amlogic_layout_mask) | \ + ((__options) & __fourcc_mod_amlogic_options_mask \ + << __fourcc_mod_amlogic_options_shift)) + +/* Amlogic FBC Layouts */ + +/* + * Amlogic FBC Basic Layout + * + * The basic layout is composed of: + * - a body content organized in 64x32 superblocks with 4096 bytes per + * superblock in default mode. + * - a 32 bytes per 128x64 header block + * + * This layout is transferrable between Amlogic SoCs supporting this modifier. + */ +#define AMLOGIC_FBC_LAYOUT_BASIC (1ULL) + +/* + * Amlogic FBC Scatter Memory layout + * + * Indicates the header contains IOMMU references to the compressed + * frames content to optimize memory access and layout. + * + * In this mode, only the header memory address is needed, thus the + * content memory organization is tied to the current producer + * execution and cannot be saved/dumped neither transferrable between + * Amlogic SoCs supporting this modifier. + */ +#define AMLOGIC_FBC_LAYOUT_SCATTER (2ULL) + +/* Amlogic FBC Layout Options Bit Mask */ + +/* + * Amlogic FBC Memory Saving mode + * + * Indicates the storage is packed when pixel size is multiple of word + * boudaries, i.e. 8bit should be stored in this mode to save allocation + * memory. + * + * This mode reduces body layout to 3072 bytes per 64x32 superblock with + * the basic layout and 3200 bytes per 64x32 superblock combined with + * the scatter layout. + */ +#define AMLOGIC_FBC_OPTION_MEM_SAVING (1ULL << 0) + #if defined(__cplusplus) } #endif -- 2.22.0