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[83.6.167.130]) by smtp.googlemail.com with ESMTPSA id b81sm8922326wmc.5.2020.05.31.10.28.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 31 May 2020 10:28:19 -0700 (PDT) From: Konrad Dybcio Cc: Konrad Dybcio , Andy Gross , Bjorn Andersson , Rob Herring , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 06/14] arm64: dts: msm8992: Add a spmi_bus node Date: Sun, 31 May 2020 19:27:56 +0200 Message-Id: <20200531172804.256335-7-konradybcio@gmail.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200531172804.256335-1-konradybcio@gmail.com> References: <20200531172804.256335-1-konradybcio@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit To: unlisted-recipients:; (no To-header on input) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This change adds a SPMI bus node so as to enable PMIC and PMIC peripherals interaction. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/msm8992.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8992.dtsi b/arch/arm64/boot/dts/qcom/msm8992.dtsi index 535be60521d8..8f7cdf2b9a1f 100644 --- a/arch/arm64/boot/dts/qcom/msm8992.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8992.dtsi @@ -253,6 +253,22 @@ msmgpio: pinctrl@fd510000 { #interrupt-cells = <2>; }; + spmi_bus: qcom,spmi@fc4c0000 { + compatible = "qcom,spmi-pmic-arb"; + reg = <0xfc4cf000 0x1000>, + <0xfc4cb000 0x1000>, + <0xfc4ca000 0x1000>; + reg-names = "core", "intr", "cnfg"; + interrupt-names = "periph_irq"; + interrupts = ; + qcom,ee = <0>; + qcom,channel = <0>; + #address-cells = <2>; + #size-cells = <0>; + interrupt-controller; + #interrupt-cells = <4>; + }; + blsp1_uart2: serial@f991e000 { compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; reg = <0xf991e000 0x1000>; -- 2.26.2