Received: by 2002:a25:683:0:0:0:0:0 with SMTP id 125csp592906ybg; Mon, 1 Jun 2020 09:12:04 -0700 (PDT) X-Google-Smtp-Source: ABdhPJx4zFw9/xAm6QnJEIJWi5zVD20jo6PqL5djew9CCoCzD7YLCUBRI0FgABrjZQV+B03/2qbo X-Received: by 2002:a17:906:aac8:: with SMTP id kt8mr20523667ejb.460.1591027924858; Mon, 01 Jun 2020 09:12:04 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1591027924; cv=none; d=google.com; s=arc-20160816; b=tbFx0tfeYkMSZIsQzb1UluLbsbu6kwK8JQb/9C2f0Ga/f2hvqpTpB0wo6N1PWbpz6Q 8cYCl3pPW+Hihcjjb57l/T3TH+pCcKuskYkfcLSMOKa/T7/yxuEeytRTyyRWiRekix6u dNVlCKfCYIdaSOyKyziu9v4tbPAUOl0fqCd57CXHahw0x0CCBpiEVsLnrNMGyU0daFoT DkOHseVGzm7dx6wVH6AY7+mpLp+mMinn73wsSdmCZWJqMZt8WVXA2B2pSNAVQzednX8D F5J5VDm4nf4lKoY7WACdJJ8sEUDXg1XNM0iwGtyfIESLq6nYL1PyW1sIYNPwLazzdaad L/Uw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:user-agent:references :message-id:in-reply-to:subject:cc:to:from:date; bh=32YgADiGVhJRokIT6sAXpyJGE2EZa/cG8hZG9fqAYYA=; b=faXsuRgepL/mV0UWJ/XG8bF3PR8cW2yBjn5vZ12DNpUALugKbfn9wVFQLdqctFeDmY FBkCEhKLuKq0PiNy02234VbLxTKOgwBhuuuRYsEkJe4YWIhSk5iWFMbzZ231TEUWcqLZ 1dyMZn0IwcMMXUIdn+LOsby5KflmYcWgdeyvdRJqkK70zsSScoRjdYnpeC9m3OqdDsEP z6ZyhbVADpd0+PS9+BFax7+bOpvIzI9u6ZkazRGGw5WDLjQMvFXxXWXeNuquAj/ac/aF LHRRoA5mp4vcJSr7PAuv/qsaPp/vqTVPKRcP0eU0cmagoamlyGY/p0hXIPkDJcme2/rX qAEA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=ispras.ru Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id e11si2692286ejh.44.2020.06.01.09.11.40; Mon, 01 Jun 2020 09:12:04 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=ispras.ru Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726944AbgFAQJf (ORCPT + 99 others); Mon, 1 Jun 2020 12:09:35 -0400 Received: from winnie.ispras.ru ([83.149.199.91]:20515 "EHLO smtp.ispras.ru" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726125AbgFAQJe (ORCPT ); Mon, 1 Jun 2020 12:09:34 -0400 Received: from monopod.intra.ispras.ru (monopod.intra.ispras.ru [10.10.3.121]) by smtp.ispras.ru (Postfix) with ESMTP id 3A87A203BF; Mon, 1 Jun 2020 19:09:29 +0300 (MSK) Date: Mon, 1 Jun 2020 19:09:29 +0300 (MSK) From: Alexander Monakov To: Suravee Suthikulpanit cc: linux-kernel@vger.kernel.org, Joerg Roedel , iommu@lists.linux-foundation.org Subject: Re: [PATCH] iommu/amd: Fix event counter availability check In-Reply-To: Message-ID: References: <20200529200738.1923-1-amonakov@ispras.ru> <56761139-f794-39b1-4dfa-dfc05fbe5f60@amd.com> User-Agent: Alpine 2.20.13 (LNX 116 2015-12-14) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > Instead of blindly moving the code around to a spot that would just work, > I am trying to understand what might be required here. In this case, > the init_device_table_dma()should not be needed. I suspect it's the IOMMU > invalidate all command that's also needed here. > > I'm also checking with the HW and BIOS team. Meanwhile, could you please give > the following change a try: Yes, this also fixes the problem for me. Alexander > > diff --git a/drivers/iommu/amd_iommu_init.c b/drivers/iommu/amd_iommu_init.c > index 5b81fd16f5fa..b07458cc1b0b 100644 > --- a/drivers/iommu/amd_iommu_init.c > +++ b/drivers/iommu/amd_iommu_init.c > @@ -1875,6 +1875,8 @@ static int __init amd_iommu_init_pci(void) > ret = iommu_init_pci(iommu); > if (ret) > break; > + iommu_flush_all_caches(iommu); > + init_iommu_perf_ctr(iommu); > } > > /*