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[23.128.96.18]) by mx.google.com with ESMTP id l60si935631edl.443.2020.06.01.22.30.08; Mon, 01 Jun 2020 22:30:31 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@redhat.com header.s=mimecast20190719 header.b=Ykr7aZeX; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=redhat.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728310AbgFBFZJ (ORCPT + 99 others); Tue, 2 Jun 2020 01:25:09 -0400 Received: from us-smtp-delivery-1.mimecast.com ([207.211.31.120]:32602 "EHLO us-smtp-1.mimecast.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1728294AbgFBFZF (ORCPT ); Tue, 2 Jun 2020 01:25:05 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1591075504; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=VehAfr1QcK1Dwcz7+ds+E0e6uhlAX/0K+5UtuSIJbmY=; b=Ykr7aZeXAj71puhTDzDkpDwNHgmlhc1TPiJ5hjsQ9I5x/mycROf37HS/8XmSJ6HWcXkvvq asdgoqZAQmTqGZmA6seJQXCzkZyq7I26HmJqwMtkJsapXHPZKT3QE5NYky/WojEJYt+DBb TlLVx/FJaQyRt1g6UEHD6vwQt8CxyvU= Received: from mail-qt1-f200.google.com (mail-qt1-f200.google.com [209.85.160.200]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-313-Y4XWxJivMeqtDIlHcQpGMg-1; Tue, 02 Jun 2020 01:24:59 -0400 X-MC-Unique: Y4XWxJivMeqtDIlHcQpGMg-1 Received: by mail-qt1-f200.google.com with SMTP id e44so12750773qta.9 for ; Mon, 01 Jun 2020 22:24:59 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=VehAfr1QcK1Dwcz7+ds+E0e6uhlAX/0K+5UtuSIJbmY=; b=uJ9Tlv3+FtCD+yl7fQU/9n7DwdjceDAM9sCIzqQjmqg24UuOqObgDPrpjn5Vt+38ka gKKkyCoF7kUvp/USHWrysQDjpuOac4II5i/SNC60MgweSxXnDqsY64qkwurPPUItEhdt 9gRf4ZwAQpwpHTU+z9g03x6QohG9zLcmjbBhynqmHBYGs1ZY6Mzpy49oP1zd8CP9uNZ7 wnZ95+JBDP+gY5Mf7dmTieWv2gTPOl88rj+ewNmYFGzuhZL11uJT12ppAqT1nZiSLSrb yE7JY6KbAOaO4RUaxSbbr9ygTZLeobj+Mgcrax2E2X9mZ8796t83B70Sm3VfJpiwug3d U17A== X-Gm-Message-State: AOAM532ieBLIteV/R3oqfJtEkrq5uuTx+kWFY50ikNVqPzM1UOTPaVHY P9QPPYjvhmGXxgLu4ODDlTC6g6SGfaVryeoCwjd3Hv3bKnaW6pZxK2M1EdUfe/xU7TUHW4VCKam L7pSIiv81ThA3k6H+i467s0fdDFY1X40lKSrATd1f X-Received: by 2002:a37:b9c7:: with SMTP id j190mr18446738qkf.210.1591075498896; Mon, 01 Jun 2020 22:24:58 -0700 (PDT) X-Received: by 2002:a37:b9c7:: with SMTP id j190mr18446721qkf.210.1591075498589; Mon, 01 Jun 2020 22:24:58 -0700 (PDT) MIME-Version: 1.0 References: <1589395957-24628-1-git-send-email-bhsharma@redhat.com> In-Reply-To: <1589395957-24628-1-git-send-email-bhsharma@redhat.com> From: Bhupesh Sharma Date: Tue, 2 Jun 2020 10:54:46 +0530 Message-ID: Subject: Re: [PATCH v6 0/2] Append new variables to vmcoreinfo (TCR_EL1.T1SZ for arm64 and MAX_PHYSMEM_BITS for all archs) To: linux-arm-kernel , x86@kernel.org Cc: Bhupesh SHARMA , Boris Petkov , Ingo Molnar , Thomas Gleixner , Jonathan Corbet , James Morse , Mark Rutland , Will Deacon , Steve Capper , Catalin Marinas , Ard Biesheuvel , Michael Ellerman , Paul Mackerras , Benjamin Herrenschmidt , Dave Anderson , Kazuhito Hagio , John Donnelly , scott.branden@broadcom.com, Amit Kachhap , linuxppc-dev@lists.ozlabs.org, Linux Kernel Mailing List , Linux Doc Mailing List , kexec mailing list Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hello, On Thu, May 14, 2020 at 12:22 AM Bhupesh Sharma wrote: > > Apologies for the delayed update. Its been quite some time since I > posted the last version (v5), but I have been really caught up in some > other critical issues. > > Changes since v5: > ---------------- > - v5 can be viewed here: > http://lists.infradead.org/pipermail/kexec/2019-November/024055.html > - Addressed review comments from James Morse and Boris. > - Added Tested-by received from John on v5 patchset. > - Rebased against arm64 (for-next/ptr-auth) branch which has Amit's > patchset for ARMv8.3-A Pointer Authentication feature vmcoreinfo > applied. > > Changes since v4: > ---------------- > - v4 can be seen here: > http://lists.infradead.org/pipermail/kexec/2019-November/023961.html > - Addressed comments from Dave and added patches for documenting > new variables appended to vmcoreinfo documentation. > - Added testing report shared by Akashi for PATCH 2/5. > > Changes since v3: > ---------------- > - v3 can be seen here: > http://lists.infradead.org/pipermail/kexec/2019-March/022590.html > - Addressed comments from James and exported TCR_EL1.T1SZ in vmcoreinfo > instead of PTRS_PER_PGD. > - Added a new patch (via [PATCH 3/3]), which fixes a simple typo in > 'Documentation/arm64/memory.rst' > > Changes since v2: > ---------------- > - v2 can be seen here: > http://lists.infradead.org/pipermail/kexec/2019-March/022531.html > - Protected 'MAX_PHYSMEM_BITS' vmcoreinfo variable under CONFIG_SPARSEMEM > ifdef sections, as suggested by Kazu. > - Updated vmcoreinfo documentation to add description about > 'MAX_PHYSMEM_BITS' variable (via [PATCH 3/3]). > > Changes since v1: > ---------------- > - v1 was sent out as a single patch which can be seen here: > http://lists.infradead.org/pipermail/kexec/2019-February/022411.html > > - v2 breaks the single patch into two independent patches: > [PATCH 1/2] appends 'PTRS_PER_PGD' to vmcoreinfo for arm64 arch, whereas > [PATCH 2/2] appends 'MAX_PHYSMEM_BITS' to vmcoreinfo in core kernel code (all archs) > > This patchset primarily fixes the regression reported in user-space > utilities like 'makedumpfile' and 'crash-utility' on arm64 architecture > with the availability of 52-bit address space feature in underlying > kernel. These regressions have been reported both on CPUs which don't > support ARMv8.2 extensions (i.e. LVA, LPA) and are running newer kernels > and also on prototype platforms (like ARMv8 FVP simulator model) which > support ARMv8.2 extensions and are running newer kernels. > > The reason for these regressions is that right now user-space tools > have no direct access to these values (since these are not exported > from the kernel) and hence need to rely on a best-guess method of > determining value of 'vabits_actual' and 'MAX_PHYSMEM_BITS' supported > by underlying kernel. > > Exporting these values via vmcoreinfo will help user-land in such cases. > In addition, as per suggestion from makedumpfile maintainer (Kazu), > it makes more sense to append 'MAX_PHYSMEM_BITS' to > vmcoreinfo in the core code itself rather than in arm64 arch-specific > code, so that the user-space code for other archs can also benefit from > this addition to the vmcoreinfo and use it as a standard way of > determining 'SECTIONS_SHIFT' value in user-land. > > Cc: Boris Petkov > Cc: Ingo Molnar > Cc: Thomas Gleixner > Cc: Jonathan Corbet > Cc: James Morse > Cc: Mark Rutland > Cc: Will Deacon > Cc: Steve Capper > Cc: Catalin Marinas > Cc: Ard Biesheuvel > Cc: Michael Ellerman > Cc: Paul Mackerras > Cc: Benjamin Herrenschmidt > Cc: Dave Anderson > Cc: Kazuhito Hagio > Cc: John Donnelly > Cc: scott.branden@broadcom.com > Cc: Amit Kachhap > Cc: x86@kernel.org > Cc: linuxppc-dev@lists.ozlabs.org > Cc: linux-arm-kernel@lists.infradead.org > Cc: linux-kernel@vger.kernel.org > Cc: linux-doc@vger.kernel.org > Cc: kexec@lists.infradead.org > > Bhupesh Sharma (2): > crash_core, vmcoreinfo: Append 'MAX_PHYSMEM_BITS' to vmcoreinfo > arm64/crash_core: Export TCR_EL1.T1SZ in vmcoreinfo > > Documentation/admin-guide/kdump/vmcoreinfo.rst | 16 ++++++++++++++++ > arch/arm64/include/asm/pgtable-hwdef.h | 1 + > arch/arm64/kernel/crash_core.c | 10 ++++++++++ > kernel/crash_core.c | 1 + > 4 files changed, 28 insertions(+) Ping. @James Morse , Others Please share if you have some comments regarding this patchset. Thanks, Bhupesh