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From:   Chen-Yu Tsai <wens@csie.org>
Date:   Wed, 3 Jun 2020 17:48:44 +0800
Message-ID: <CAGb2v66rZpX-+DK_MnP7RRp7LL7GrXTd1ExpE6z_AjKDVjVwNg@mail.gmail.com>
Subject: Re: [PATCH 1/4] clk: sunxi-ng: add support for the Allwinner A100 CCU
To:     =?UTF-8?B?5p2O5oms6Z+s?= <frank@allwinnertech.com>
Cc:     Maxime Ripard <maxime@cerno.tech>, "robh+dt" <robh+dt@kernel.org>,
        mturquette <mturquette@baylibre.com>, sboyd <sboyd@kernel.org>,
        "linus.walleij" <linus.walleij@linaro.org>,
        "p.zabel" <p.zabel@pengutronix.de>,
        =?UTF-8?B?6buE54OB55Sf?= <huangshuosheng@allwinnertech.com>,
        "tiny.windzz" <tiny.windzz@gmail.com>,
        linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
        devicetree <devicetree@vger.kernel.org>,
        linux-kernel <linux-kernel@vger.kernel.org>,
        linux-clk <linux-clk@vger.kernel.org>,
        linux-gpio <linux-gpio@vger.kernel.org>
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On Wed, Jun 3, 2020 at 5:42 PM 李扬韬 <frank@allwinnertech.com> wrote:
>
> >> + /* Enable the lock bits on all PLLs */
> >> + for (i = 0; i < ARRAY_SIZE(pll_regs); i++) {
> >> +  val = readl(reg + pll_regs[i]);
> >> +  val |= BIT(29);
> >
> >Having a define for that would be nice here
> >
> >> +  writel(val, reg + pll_regs[i]);
> >> + }
> >> +
> >> + /*
> >> +  * In order to pass the EMI certification, the SDM function of
> >> +  * the peripheral 1 bus is enabled, and the frequency is still
> >> +  * calculated using the previous division factor.
> >> +  */
> >> + writel(0xd1303333, reg + SUN50I_A100_PLL_PERIPH1_PATTERN0_REG);
> >
> >Same here
>
> Having a define? I don’t quite understand what you mean,
> can you give me an example?

What Maxime means is that 0xd1303333 is a magic number.
It is better to make a properly named macro, or many macros
that you then bitwise-OR together. So you should make macros
for each bitfield in that register, which would likely include
the SDM calculation factors, the enable bit, and any other fields.

ChenYu

> MBR,
> Yangtao