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[23.128.96.18]) by mx.google.com with ESMTP id eb10si1340999edb.410.2020.06.03.05.58.57; Wed, 03 Jun 2020 05:59:20 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@st.com header.s=STMicroelectronics header.b=1NYkV2Nc; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=st.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726095AbgFCM4J (ORCPT + 99 others); Wed, 3 Jun 2020 08:56:09 -0400 Received: from mx08-00178001.pphosted.com ([91.207.212.93]:16776 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1725930AbgFCM4F (ORCPT ); Wed, 3 Jun 2020 08:56:05 -0400 Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 053CqDo6021444; Wed, 3 Jun 2020 14:55:39 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=st.com; h=from : to : cc : subject : date : message-id : mime-version : content-type; s=STMicroelectronics; bh=jdp1plbLpLgjvRgPP9F4ETyWDpfXePaZkpFBRFFIxfE=; b=1NYkV2NcuqmyTEX0bPFHHxq6Ez5NVzma3uoaT3CnOstSPMw5TBxlk2mAWDUUbhjvbCKH upmvzkH8eHnbiPQNRzJubUQKqA9aoLxyB+P23qeSlwlhFrnmoL3J/09juWVn16vlXu4h ZjMED91GB3k3e2O6bMUo/IdFZKn2bTa2wlGSskwQguJyaxGI0xh+nwuTFpLkdVismKSF emqkzHujU1l796UOLEoAoWK0sOkMVf2CApmyk9ZJRimV0trhTGIY1PkAhI1nOZcyNhtN ST4i9KfjyWodQgpy5hRCfwL8s245S00XG66iDoWUKXlSqgKeQTSF/T3O+RNwCUZzoaw5 uQ== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 31bcm94rpd-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 03 Jun 2020 14:55:39 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id AA1A8100034; Wed, 3 Jun 2020 14:55:38 +0200 (CEST) Received: from Webmail-eu.st.com (sfhdag3node3.st.com [10.75.127.9]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 777662CBE8A; Wed, 3 Jun 2020 14:55:38 +0200 (CEST) Received: from localhost (10.75.127.45) by SFHDAG3NODE3.st.com (10.75.127.9) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Wed, 3 Jun 2020 14:54:41 +0200 From: Benjamin Gaignard To: , , , , , , , CC: , , , , Benjamin Gaignard Subject: [RESEND v7 0/6] clockevent: add low power STM32 timer Date: Wed, 3 Jun 2020 14:54:33 +0200 Message-ID: <20200603125439.23275-1-benjamin.gaignard@st.com> X-Mailer: git-send-email 2.15.0 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.75.127.45] X-ClientProxiedBy: SFHDAG7NODE1.st.com (10.75.127.19) To SFHDAG3NODE3.st.com (10.75.127.9) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.216,18.0.687 definitions=2020-06-03_12:2020-06-02,2020-06-03 signatures=0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This series add low power timer as boadcast clockevent device. Low power timer could runs even when CPUs are in idle mode and could wakeup them. Lee has acked the MFD part. Clocksource driver still need to be reviewed by maintainers. Add missing part of the bindings to describe interrupt. version 7 resend: - with Daniel ack for driver patch - with Rob review for bindings patch version 7: - rebased on top of v5.7-rc2 version 6: - simplify binding, DT and code to use only one interrupt version 5: - document interrupts and interrupt-names bindings - use a different wake up interrupt - add device-tree patch - make STM32MP157 select low power timer configuration flag - enable fast_io in regmap configuration version 4: - move defines in mfd/stm32-lptimer.h - change compatible and subnode names - document wakeup-source property - reword commit message - make driver Kconfig depends of MFD_STM32_LPTIMER - remove useless include - remove rate and clk fields from the private structure - to add comments about the registers sequence in stm32_clkevent_lp_set_timer - rework probe function and use devm_request_irq() - do not allow module to be removed version 3: - fix timer set sequence - don't forget to free irq on remove function - use devm_kzalloc to simplify errors handling in probe function version 2: - stm32 clkevent driver is now a child of the stm32 lp timer node - add a probe function and adpat the driver to use regmap provide by it parent - stop using timer_of helpers Benjamin Gaignard (6): dt-bindings: mfd: Document STM32 low power timer bindings ARM: dts: stm32: Add timer subnodes on stm32mp15 SoCs mfd: stm32: Add defines to be used for clkevent purpose mfd: stm32: enable regmap fast_io for stm32-lptimer clocksource: Add Low Power STM32 timers driver ARM: mach-stm32: select low power timer for STM32MP157 .../devicetree/bindings/mfd/st,stm32-lptimer.yaml | 5 + arch/arm/boot/dts/stm32mp151.dtsi | 35 ++++ arch/arm/mach-stm32/Kconfig | 1 + drivers/clocksource/Kconfig | 4 + drivers/clocksource/Makefile | 1 + drivers/clocksource/timer-stm32-lp.c | 221 +++++++++++++++++++++ drivers/mfd/stm32-lptimer.c | 1 + include/linux/mfd/stm32-lptimer.h | 5 + 8 files changed, 273 insertions(+) create mode 100644 drivers/clocksource/timer-stm32-lp.c -- 2.15.0