Received: by 2002:a25:683:0:0:0:0:0 with SMTP id 125csp1588199ybg; Thu, 4 Jun 2020 13:43:11 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyCGpnepUaPKrgoiWgAG4o1CnNulZLQMui4/NmmaKi+CKm5UrYc2CvtLGE6AJYtysGVZpqM X-Received: by 2002:a05:6402:1d82:: with SMTP id dk2mr5905931edb.75.1591303391151; Thu, 04 Jun 2020 13:43:11 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1591303391; cv=none; d=google.com; s=arc-20160816; b=UVzrbZo27OJAgF6kAMgLjZWVe+lH6amABW2JRqr+ngbvHM1lu/Os8fqj15IbVjNJMt DohnmVvkNfmYVAkbSnUUkmLPmFRcSoMUSmrzJg/f0IiQjtOnm6FmI/DuCIv8cA+B8jfi XNSf+FUgxLVjTmcrIZUbKiORKZfK3yT0jky6ZhSr2pwSs5h+efT3194Rb9r7/pqzal7U mMVp9gxXtsY23jKytiE+UtGiHwlMord/xqu0dBRafhhFuJpgieLF53NiQQu0hnDp3l+K 0woAb/faiOey7SF+hssjOGXg5Qg9OlMY0TWp6gH0bKLifdqY6klrX6MsewrCgg/Up7vf vK8A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :message-id:to:from:cc:in-reply-to:subject:date:dkim-signature; bh=tOm0eZIfTixCIuiiTONw0d8MpMY0xEkqqW2K4o8xHYE=; b=iBZAMaATAVw9zFu+z/iAzxcw2+/KVkoTmJtmQU+g8tp1ZR2Wh9SHzNTte7kVXCpQUq 3liYpKoS7jcph+sUye1ef36Uk9bbE5u+W3+1qKn+FIYeN2T6C56RkdhCaWrs/ss4O6f7 4fShbSYehsvpGmuVfvLmVAKWr0n36Fiye04ezc+qHPt4rueDv/LBPK+lXo15/U1UF+kx TSIk25tbOZ5rJQHfqWZCuWFnq0MPjurIT9gl/PBx7tv1pcapQe0SN0Lz6zU/bvwKc9V3 I0nVVS9uLuD5QzpGTYk3sWCWXdDxEMn8ydaaB6tstJMmKNl8udVehHOJbH5jwQ+1k/h7 2+vw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@dabbelt-com.20150623.gappssmtp.com header.s=20150623 header.b="ehCLDs/3"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id bo12si2245493edb.430.2020.06.04.13.42.47; Thu, 04 Jun 2020 13:43:11 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@dabbelt-com.20150623.gappssmtp.com header.s=20150623 header.b="ehCLDs/3"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730051AbgFDUk1 (ORCPT + 99 others); Thu, 4 Jun 2020 16:40:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54566 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729828AbgFDUkV (ORCPT ); Thu, 4 Jun 2020 16:40:21 -0400 Received: from mail-pj1-x1041.google.com (mail-pj1-x1041.google.com [IPv6:2607:f8b0:4864:20::1041]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BE57FC08C5C2 for ; Thu, 4 Jun 2020 13:40:19 -0700 (PDT) Received: by mail-pj1-x1041.google.com with SMTP id m2so1735155pjv.2 for ; Thu, 04 Jun 2020 13:40:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=dabbelt-com.20150623.gappssmtp.com; s=20150623; h=date:subject:in-reply-to:cc:from:to:message-id:mime-version :content-transfer-encoding; bh=tOm0eZIfTixCIuiiTONw0d8MpMY0xEkqqW2K4o8xHYE=; b=ehCLDs/32BzqqIn6f6SwjjPXO9KP3vf55FjWqEqklC4xvw5E7bMZa28s8uQSfCBeNz L6dc1ieExL+7vlLqmQ0/lyOp2M4ICnoKOWoQvXEaknRAN8tmhLq/WVMAQeeXBMcjP9D6 3RuWyPaMG4tHZr8xq62MEA3JBDrJ1g6UIEkUgeLhrAUOSG253UV6VUVCsz31sJI5stXg utocO4or8BMGQh9E85ibZom/QdW9WYGw2UJ20S0rR5ua2KHAJG3IFHDoxVmtjCcO4p+k c2wX8Uz9hvNyy5I0BNAByB6m5FIsQVJ+Mjb0dZIJn3gtPpuM7UX4nvapcwYn3Ftp45K9 3+NA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:subject:in-reply-to:cc:from:to:message-id :mime-version:content-transfer-encoding; bh=tOm0eZIfTixCIuiiTONw0d8MpMY0xEkqqW2K4o8xHYE=; b=N9hsq77pQZR8LQwXAjKqMSUh3elB3hg4Dsxdei8lqm8M5n+LSHiu9iEtZJlKLhdhvc SQPPCw8yVFywzL8/xAc8QGQhEl+t7wNgdVW7EZM7qVRK+pfgQroeBffYbjwGhjRrLdtf P1hhvsE42/0HxNXwZ6ZdJgCsCf2JoNnI2FN6/mYMC2N3GSH0080PwL5K1n7HVldUQWgv JtIxqB62rm1M9yravyv60HDOgcmxFpHHOxjC4zlK35W6H2nplWHD4+VFP4tYJE9bYkgS cabFqCDFbJuEMCAuWTwPlswss79kc6eaELQHuszwdQQwxMLnw+qMKAbEj15l6xgMnouK vz2A== X-Gm-Message-State: AOAM531yfHPfHgrqYtYxz3CYhAPe1ToGntsdyBjzH3w1a9natlbh2eUg kuuZJB6TJHx4y9Zdeokq5snUOw== X-Received: by 2002:a17:902:6b09:: with SMTP id o9mr6626139plk.45.1591303219131; Thu, 04 Jun 2020 13:40:19 -0700 (PDT) Received: from localhost (76-210-143-223.lightspeed.sntcca.sbcglobal.net. [76.210.143.223]) by smtp.gmail.com with ESMTPSA id e78sm5378955pfh.50.2020.06.04.13.40.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 04 Jun 2020 13:40:18 -0700 (PDT) Date: Thu, 04 Jun 2020 13:40:18 -0700 (PDT) X-Google-Original-Date: Thu, 04 Jun 2020 13:27:53 PDT (-0700) Subject: Re: [PATCH 2/5] RISC-V: Remove CLINT related code In-Reply-To: <20200521134544.816918-3-anup.patel@wdc.com> CC: Paul Walmsley , aou@eecs.berkeley.edu, robh+dt@kernel.org, daniel.lezcano@linaro.org, tglx@linutronix.de, Damien Le Moal , Atish Patra , Alistair Francis , anup@brainfault.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Anup Patel From: Palmer Dabbelt To: Anup Patel Message-ID: Mime-Version: 1.0 (MHng) Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, 21 May 2020 06:45:41 PDT (-0700), Anup Patel wrote: > We will be having separate CLINT timer driver which will also > provide CLINT based IPI operations so let's remove CLINT related > code from arch/riscv directory. This will leave the system unbootable, which breaks bisecting. > > Signed-off-by: Anup Patel > --- > arch/riscv/include/asm/clint.h | 39 ------------------------------ > arch/riscv/kernel/Makefile | 2 +- > arch/riscv/kernel/clint.c | 44 ---------------------------------- > arch/riscv/kernel/setup.c | 2 -- > arch/riscv/kernel/smp.c | 1 - > arch/riscv/kernel/smpboot.c | 1 - > 6 files changed, 1 insertion(+), 88 deletions(-) > delete mode 100644 arch/riscv/include/asm/clint.h > delete mode 100644 arch/riscv/kernel/clint.c > > diff --git a/arch/riscv/include/asm/clint.h b/arch/riscv/include/asm/clint.h > deleted file mode 100644 > index a279b17a6aad..000000000000 > --- a/arch/riscv/include/asm/clint.h > +++ /dev/null > @@ -1,39 +0,0 @@ > -/* SPDX-License-Identifier: GPL-2.0 */ > -#ifndef _ASM_RISCV_CLINT_H > -#define _ASM_RISCV_CLINT_H 1 > - > -#include > -#include > - > -#ifdef CONFIG_RISCV_M_MODE > -extern u32 __iomem *clint_ipi_base; > - > -void clint_init_boot_cpu(void); > - > -static inline void clint_send_ipi_single(unsigned long hartid) > -{ > - writel(1, clint_ipi_base + hartid); > -} > - > -static inline void clint_send_ipi_mask(const struct cpumask *mask) > -{ > - int cpu; > - > - for_each_cpu(cpu, mask) > - clint_send_ipi_single(cpuid_to_hartid_map(cpu)); > -} > - > -static inline void clint_clear_ipi(unsigned long hartid) > -{ > - writel(0, clint_ipi_base + hartid); > -} > -#else /* CONFIG_RISCV_M_MODE */ > -#define clint_init_boot_cpu() do { } while (0) > - > -/* stubs to for code is only reachable under IS_ENABLED(CONFIG_RISCV_M_MODE): */ > -void clint_send_ipi_single(unsigned long hartid); > -void clint_send_ipi_mask(const struct cpumask *hartid_mask); > -void clint_clear_ipi(unsigned long hartid); > -#endif /* CONFIG_RISCV_M_MODE */ > - > -#endif /* _ASM_RISCV_CLINT_H */ > diff --git a/arch/riscv/kernel/Makefile b/arch/riscv/kernel/Makefile > index d8bbd3207100..529cda705cfe 100644 > --- a/arch/riscv/kernel/Makefile > +++ b/arch/riscv/kernel/Makefile > @@ -31,7 +31,7 @@ obj-y += cacheinfo.o > obj-y += patch.o > obj-$(CONFIG_MMU) += vdso.o vdso/ > > -obj-$(CONFIG_RISCV_M_MODE) += clint.o traps_misaligned.o > +obj-$(CONFIG_RISCV_M_MODE) += traps_misaligned.o > obj-$(CONFIG_FPU) += fpu.o > obj-$(CONFIG_SMP) += smpboot.o > obj-$(CONFIG_SMP) += smp.o > diff --git a/arch/riscv/kernel/clint.c b/arch/riscv/kernel/clint.c > deleted file mode 100644 > index 3647980d14c3..000000000000 > --- a/arch/riscv/kernel/clint.c > +++ /dev/null > @@ -1,44 +0,0 @@ > -// SPDX-License-Identifier: GPL-2.0 > -/* > - * Copyright (c) 2019 Christoph Hellwig. > - */ > - > -#include > -#include > -#include > -#include > -#include > -#include > -#include > - > -/* > - * This is the layout used by the SiFive clint, which is also shared by the qemu > - * virt platform, and the Kendryte KD210 at least. > - */ > -#define CLINT_IPI_OFF 0 > -#define CLINT_TIME_CMP_OFF 0x4000 > -#define CLINT_TIME_VAL_OFF 0xbff8 > - > -u32 __iomem *clint_ipi_base; > - > -void clint_init_boot_cpu(void) > -{ > - struct device_node *np; > - void __iomem *base; > - > - np = of_find_compatible_node(NULL, NULL, "riscv,clint0"); > - if (!np) { > - panic("clint not found"); > - return; > - } > - > - base = of_iomap(np, 0); > - if (!base) > - panic("could not map CLINT"); > - > - clint_ipi_base = base + CLINT_IPI_OFF; > - riscv_time_cmp = base + CLINT_TIME_CMP_OFF; > - riscv_time_val = base + CLINT_TIME_VAL_OFF; > - > - clint_clear_ipi(boot_cpu_hartid); > -} > diff --git a/arch/riscv/kernel/setup.c b/arch/riscv/kernel/setup.c > index 145128a7e560..b07a583bf53b 100644 > --- a/arch/riscv/kernel/setup.c > +++ b/arch/riscv/kernel/setup.c > @@ -18,7 +18,6 @@ > #include > #include > > -#include > #include > #include > #include > @@ -76,7 +75,6 @@ void __init setup_arch(char **cmdline_p) > setup_bootmem(); > paging_init(); > unflatten_device_tree(); > - clint_init_boot_cpu(); > > #ifdef CONFIG_SWIOTLB > swiotlb_init(1); > diff --git a/arch/riscv/kernel/smp.c b/arch/riscv/kernel/smp.c > index 8375cc5970f6..8a23f1eb5400 100644 > --- a/arch/riscv/kernel/smp.c > +++ b/arch/riscv/kernel/smp.c > @@ -17,7 +17,6 @@ > #include > #include > > -#include > #include > #include > #include > diff --git a/arch/riscv/kernel/smpboot.c b/arch/riscv/kernel/smpboot.c > index 5fe849791bf0..a6cfa9842d4b 100644 > --- a/arch/riscv/kernel/smpboot.c > +++ b/arch/riscv/kernel/smpboot.c > @@ -24,7 +24,6 @@ > #include > #include > #include > -#include > #include > #include > #include