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[23.128.96.18]) by mx.google.com with ESMTP id d14si9059122edp.573.2020.06.08.04.18.14; Mon, 08 Jun 2020 04:18:37 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=Q9Wpo9bE; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729487AbgFHLQX (ORCPT + 99 others); Mon, 8 Jun 2020 07:16:23 -0400 Received: from mail.kernel.org ([198.145.29.99]:33690 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729371AbgFHLQW (ORCPT ); Mon, 8 Jun 2020 07:16:22 -0400 Received: from localhost (fw-tnat.cambridge.arm.com [217.140.96.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 304192072F; Mon, 8 Jun 2020 11:16:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1591614981; bh=zYU+C+PGf5dDW4qDWm1pWIclB3owG0XcTceTu8qombA=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=Q9Wpo9bEJEdcTJMCyKy7ZT9rxa47Nd99waxgfzn77Rlv9kyqNQWO/sOpSwzfoBVg9 0DW8je9lPY6x510TuzCC+BBhYLLYeQnZdCEcktminkIoc29RmfBjPj2+A9m0xqKQKi MNJPs5KbE8PQtxoMoXhlZQv4RFvDnxmq2xZb2DdE= Date: Mon, 8 Jun 2020 12:16:19 +0100 From: Mark Brown To: Pavel Machek Cc: Greg Kroah-Hartman , linux-kernel@vger.kernel.org, stable@vger.kernel.org, fengsheng , Xinwei Kong , Sasha Levin Subject: Re: [PATCH 4.19 15/28] spi: dw: use "smp_mb()" to avoid sending spi data error Message-ID: <20200608111619.GB4593@sirena.org.uk> References: <20200605140252.338635395@linuxfoundation.org> <20200605140253.279609547@linuxfoundation.org> <20200607200910.GA13138@amd> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="JYK4vJDZwFMowpUq" Content-Disposition: inline In-Reply-To: <20200607200910.GA13138@amd> X-Cookie: I'm rated PG-34!! User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --JYK4vJDZwFMowpUq Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Sun, Jun 07, 2020 at 10:09:11PM +0200, Pavel Machek wrote: > > Because of out-of-order execution about some CPU architecture, > > In this debug stage we find Completing spi interrupt enable -> > > prodrucing TXEI interrupt -> running "interrupt_transfer" function > > will prior to set "dw->rx and dws->rx_end" data, so this patch add > > memory barrier to enable dw->rx and dw->rx_end to be visible and > > solve to send SPI data error. > So, this is apparently CPU-vs-device issue... The commit message is a bit unclear but my read had been interrupt handler racing with sending new data rather than an ordering issue with writes to the hardware. =20 --JYK4vJDZwFMowpUq Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQEzBAABCgAdFiEEreZoqmdXGLWf4p/qJNaLcl1Uh9AFAl7eHgIACgkQJNaLcl1U h9DhCwf/d1dXgEHH5Hb83+eAVx5v90fL3DClK2WyN5AJ/z1D2CZILow8Ky35z2Yb 33tiaskGua1M+7vsabIQ9pYSZL8oOkYwrDwP5UXGTJK4pwJxkBEpFL5ab+x6dTc9 9TUx/93YOc/OhD45++q3dEzUmS8ZoPKHiwxaglfe76Dw6S2wSErBsACqmWWZMUvz VkkLcuJDcxpL+jjIwWDfkD4jKovGgJd8g4dAoJ+WGBHGYSr0SqYxlBVWlYP0yPaV +h8aMjgeKHdWytbm6DHuo3bBgxgGUoif0s9wbAYxaW0piJzB9DGqHBxFhMtE3FF3 PZZ49fhK8VXpyCy+4wNylwx+lE2JXg== =cxCC -----END PGP SIGNATURE----- --JYK4vJDZwFMowpUq--