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[79.139.237.54]) by smtp.gmail.com with ESMTPSA id l22sm4323522lji.120.2020.06.09.06.14.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 09 Jun 2020 06:14:39 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Georgi Djakov , Rob Herring , Michael Turquette , Stephen Boyd , Peter De Schrijver , MyungJoo Ham , Kyungmin Park , Chanwoo Choi , Mikko Perttunen Cc: =?UTF-8?q?Artur=20=C5=9Awigo=C5=84?= , linux-tegra@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org Subject: [PATCH v4 12/37] PM / devfreq: tegra20: Use MC timings for building OPP table Date: Tue, 9 Jun 2020 16:13:39 +0300 Message-Id: <20200609131404.17523-13-digetx@gmail.com> X-Mailer: git-send-email 2.26.0 In-Reply-To: <20200609131404.17523-1-digetx@gmail.com> References: <20200609131404.17523-1-digetx@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The clk_round_rate() won't be usable for building OPP table once interconnect support will be added to the EMC driver because that CLK API function limits the rounded rate based on the clk rate that is imposed by active clk-users, and thus, the rounding won't work as expected if interconnect will set the minimum EMC clock rate before devfreq driver is loaded. The struct tegra_mc contains memory timings which could be used by the devfreq driver for building up OPP table instead of rounding clock rate, this patch implements this idea. Signed-off-by: Dmitry Osipenko --- drivers/devfreq/tegra20-devfreq.c | 18 +++++++++++------- 1 file changed, 11 insertions(+), 7 deletions(-) diff --git a/drivers/devfreq/tegra20-devfreq.c b/drivers/devfreq/tegra20-devfreq.c index 6469dc69c5e0..bf504ca4dea2 100644 --- a/drivers/devfreq/tegra20-devfreq.c +++ b/drivers/devfreq/tegra20-devfreq.c @@ -123,8 +123,7 @@ static int tegra_devfreq_probe(struct platform_device *pdev) { struct tegra_devfreq *tegra; struct tegra_mc *mc; - unsigned long max_rate; - unsigned long rate; + unsigned int i; int err; mc = tegra_get_memory_controller(); @@ -151,12 +150,17 @@ static int tegra_devfreq_probe(struct platform_device *pdev) tegra->regs = mc->regs; - max_rate = clk_round_rate(tegra->emc_clock, ULONG_MAX); - - for (rate = 0; rate <= max_rate; rate++) { - rate = clk_round_rate(tegra->emc_clock, rate); + if (!mc->num_timings) { + err = dev_pm_opp_add(&pdev->dev, + clk_get_rate(tegra->emc_clock), 0); + if (err) { + dev_err(&pdev->dev, "failed to add OPP: %d\n", err); + return err; + } + } - err = dev_pm_opp_add(&pdev->dev, rate, 0); + for (i = 0; i < mc->num_timings; i++) { + err = dev_pm_opp_add(&pdev->dev, mc->timings[i].rate, 0); if (err) { dev_err(&pdev->dev, "failed to add opp: %d\n", err); goto remove_opps; -- 2.26.0