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Reply-To: vadivel.muruganx.ramuthevar@linux.intel.com
Subject: Re: [PATCH v1 2/2] usb: phy: Add USB3 PHY support for Intel LGM SoC
To:     Philipp Zabel <p.zabel@pengutronix.de>,
        linux-kernel@vger.kernel.org, balbi@kernel.org
Cc:     gregkh@linuxfoundation.org, robh@kernel.org,
        devicetree@vger.kernel.org, linux-usb@vger.kernel.org,
        cheol.yong.kim@intel.com, qi-ming.wu@intel.com, yin1.li@intel.com,
        andriy.shevchenko@intel.com
References: <20200609110850.43469-1-vadivel.muruganx.ramuthevar@linux.intel.com>
 <20200609110850.43469-3-vadivel.muruganx.ramuthevar@linux.intel.com>
 <d2f30dbde89050e428b61092a1e5bbcf8d257129.camel@pengutronix.de>
From:   "Ramuthevar, Vadivel MuruganX" 
        <vadivel.muruganx.ramuthevar@linux.intel.com>
Message-ID: <1ed87ef0-170d-4543-5d90-8c8b223c704c@linux.intel.com>
Date:   Wed, 10 Jun 2020 10:11:42 +0800
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Hi Philipp,

    Thanks for the review comments...

On 9/6/2020 8:14 pm, Philipp Zabel wrote:
>> +
>> +	for (i = 0; i < ARRAY_SIZE(CTL_RESETS); i++)
>> +		reset_control_deassert(resets[i]);
>> +	/* Need to wait at least 20us before de-assert the PHY */
>> +	usleep_range(20, 100);
> This waits 20us after de-asserting the reset, not before. Is this in the
> correct place?
This is correct place , but the above mentioned comments are wrong, need 
to re-write the comments as below...

/* out-of-band reset of the controller after PHY reset
  * will cause controller malfunctioning, so should use in-bandcontroller
  * reset only and leave the controller de-asserted here.
  */
     for (i = 0; i < ARRAY_SIZE(CTL_RESETS); i++)
             reset_control_deassert(resets[i]);

/* Need to wait at least 20us after de-assert the PHY */
     usleep_range(20, 100);


Regards
Vadivel

>