Received: by 2002:a25:683:0:0:0:0:0 with SMTP id 125csp253325ybg; Tue, 9 Jun 2020 23:09:20 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzLX2YRfCLhX+2mG9Gy0vazNQ+FxSBx/Xf+5JwI0+k46fvWg7a1VBxIz3XadFKY1b2axTjR X-Received: by 2002:aa7:cd12:: with SMTP id b18mr1142666edw.195.1591769360662; Tue, 09 Jun 2020 23:09:20 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1591769360; cv=none; d=google.com; s=arc-20160816; b=c4/pEpzTTiykVhHiWPMvcbWdxC3nWxzgevzwve129x9+z416H6QhGFgqDrZ7sJr669 k5JmnvnnBll2TeptIvwTe/UppEwOyuSoyiGBGGd2GHAPJj6zwW2FAl+FvCjwbD9n3umO +2KXkpS844+B9aaDGI/WO43zLaI+b5xlRrhTJ1a/TihS3/4TGhscsgDqdkVhu/Q4jAlL TQ9WetgI78NAJPFEp4tHxa3xDoQ3c2H0G+hQhcWUIZq9ViIuxN/U9uBD4b28nsMZtHRk 2T8AVvD/BXviiUyQ3LgKH67uVILENX/OCDtkxDxqyu8m6bqX8HDKoqcGmBV4hRqYRjjl v3TQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:dkim-signature:mime-version:references :in-reply-to:message-id:date:subject:cc:to:from; bh=FE3zccXsSJw4dQg1KvzPkaznm8tF4D5l77Bo/LLBkaM=; b=Zu8kamI6Y25rIV0/fQYIrae4CX7WNLKLqHqbnBsQsT5KWcy/lAG4QPhxebBfwNnAGw GG9I4iFwRK5nllxu3OcVlREXkzNWwcicCnYEJ1nVS7Cn9g7jiajrW8R434A8+jbK9sK8 MhRvJufmyK/YFutLtWvptqkIZEnUtCePsIj/ht9B/pvxqIjLRLWBcWL116j9u5+ZGbFj lC0pifTy5vAC0pGYiMDoMZK0gjN2uUeMNx8yCo6KrEII+JPB9RxZNSwr+iTM8F70MTSc 7hOzKLLW2nrOiKgjur06xkVwq2mrXdV4Wj+HGS+S5abF+ohZDKMDiGNoZt4lwPMpuwhC JRZw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@nvidia.com header.s=n1 header.b=qfnckt+M; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=nvidia.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id i21si7108641ejj.293.2020.06.09.23.08.58; Tue, 09 Jun 2020 23:09:20 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@nvidia.com header.s=n1 header.b=qfnckt+M; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=nvidia.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726553AbgFJGEd (ORCPT + 99 others); Wed, 10 Jun 2020 02:04:33 -0400 Received: from hqnvemgate24.nvidia.com ([216.228.121.143]:11212 "EHLO hqnvemgate24.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726186AbgFJGCr (ORCPT ); Wed, 10 Jun 2020 02:02:47 -0400 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate24.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Tue, 09 Jun 2020 23:01:15 -0700 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Tue, 09 Jun 2020 23:02:46 -0700 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Tue, 09 Jun 2020 23:02:46 -0700 Received: from HQMAIL107.nvidia.com (172.20.187.13) by HQMAIL109.nvidia.com (172.20.187.15) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Wed, 10 Jun 2020 06:02:46 +0000 Received: from hqnvemgw03.nvidia.com (10.124.88.68) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via Frontend Transport; Wed, 10 Jun 2020 06:02:46 +0000 Received: from skomatineni-linux.nvidia.com (Not Verified[10.2.167.70]) by hqnvemgw03.nvidia.com with Trustwave SEG (v7,5,8,10121) id ; Tue, 09 Jun 2020 23:02:45 -0700 From: Sowjanya Komatineni To: , , , , , , , CC: , , , , , , , Subject: [RFC PATCH v1 04/18] i2c: tegra: Fix the error path in tegra_i2c_runtime_resume Date: Tue, 9 Jun 2020 23:02:26 -0700 Message-ID: <1591768960-31648-5-git-send-email-skomatineni@nvidia.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1591768960-31648-1-git-send-email-skomatineni@nvidia.com> References: <1591768960-31648-1-git-send-email-skomatineni@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 Content-Type: text/plain DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1591768875; bh=FE3zccXsSJw4dQg1KvzPkaznm8tF4D5l77Bo/LLBkaM=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:X-NVConfidentiality:MIME-Version: Content-Type; b=qfnckt+MTSZJWTCS16Faw36qp6V4mxwiqEgki2rm3rbSG7DWgXxUyNTa3NxsA5cba nL44D04iaCA9aoZuHtZK411MM8affCmuMTh6zewkeNFu5BxqkFVSo25rLy1Tv6471g ZFIcKA/nexHymQuOA8t+0YnzzC7+l4mlSWlsdiXWWSBWMQa5AotXDOrcPrQik88It0 ktkE5PdpkesyxBBJ/Oits55fH7vcNBDOlF3BoMaL/aEK/OBt4YCzJKinScJilVkK0d 76Zc5Jp++lqeh52QQ1TYRzTJaTuZW7Ne35Rel815zpWVQ+/GozzX42sq5d1RCOACam xU+5Nv8brGFHA== Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org tegra_i2c_runtime_resume does not disable prior enabled clocks properly. This patch fixes it. Signed-off-by: Sowjanya Komatineni --- drivers/i2c/busses/i2c-tegra.c | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c index 3be1018..dba38a5 100644 --- a/drivers/i2c/busses/i2c-tegra.c +++ b/drivers/i2c/busses/i2c-tegra.c @@ -668,7 +668,7 @@ static int __maybe_unused tegra_i2c_runtime_resume(struct device *dev) ret = clk_enable(i2c_dev->slow_clk); if (ret < 0) { dev_err(dev, "failed to enable slow clock: %d\n", ret); - return ret; + goto disable_fast_clk; } } @@ -676,11 +676,18 @@ static int __maybe_unused tegra_i2c_runtime_resume(struct device *dev) if (ret < 0) { dev_err(i2c_dev->dev, "Enabling div clk failed, err %d\n", ret); - clk_disable(i2c_dev->fast_clk); - return ret; + goto disable_slow_clk; } return 0; + +disable_slow_clk: + if (i2c_dev->slow_clk) + clk_disable(i2c_dev->slow_clk); +disable_fast_clk: + if (!i2c_dev->hw->has_single_clk_source) + clk_disable(i2c_dev->fast_clk); + return ret; } static int __maybe_unused tegra_i2c_runtime_suspend(struct device *dev) -- 2.7.4