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From:   =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= <f4bug@amsat.org>
Date:   Wed, 10 Jun 2020 10:29:31 +0200
Message-ID: <CAAdtpL7dUZ2RqkrqSxiZxDbp4qY-KdtSc7CyuR+rbnRRA2Yvrw@mail.gmail.com>
Subject: Re: [PATCH 2/2] clk: bcm63xx-gate: add BCM6318 support
To:     =?UTF-8?B?w4FsdmFybyBGZXJuw6FuZGV6IFJvamFz?= <noltari@gmail.com>
Cc:     Florian Fainelli <f.fainelli@gmail.com>,
        Michael Turquette <mturquette@baylibre.com>,
        Stephen Boyd <sboyd@kernel.org>,
        Rob Herring <robh+dt@kernel.org>,
        bcm-kernel-feedback-list <bcm-kernel-feedback-list@broadcom.com>,
        Julia Lawall <julia.lawall@lip6.fr>,
        Jonas Gorski <jonas.gorski@gmail.com>,
        kbuild test robot <lkp@intel.com>,
        linux-clk <linux-clk@vger.kernel.org>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@vger.kernel.org>,
        Linux ARM <linux-arm-kernel@lists.infradead.org>,
        open list <linux-kernel@vger.kernel.org>
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Hi,

On Wed, Jun 10, 2020 at 8:13 AM Álvaro Fernández Rojas
<noltari@gmail.com> wrote:
>
> Hi Florian,
>
> > El 10 jun 2020, a las 4:27, Florian Fainelli <f.fainelli@gmail.com> escribió:
> >
> >
> >
> > On 6/9/2020 4:30 AM, Álvaro Fernández Rojas wrote:
> >> +static const struct clk_bcm63xx_table_entry bcm6318_clocks[] = {
> >> +    { .name = "adsl_asb", .bit = 0, },
> >> +    { .name = "usb_asb", .bit = 1, },
> >> +    { .name = "mips_asb", .bit = 2, },
> >> +    { .name = "pcie_asb", .bit = 3, },
> >> +    { .name = "phymips_asb", .bit = 4, },
> >> +    { .name = "robosw_asb", .bit = 5, },
> >> +    { .name = "sar_asb", .bit = 6, },
> >> +    { .name = "sdr_asb", .bit = 7, },
> >> +    { .name = "swreg_asb", .bit = 8, },
> >> +    { .name = "periph_asb", .bit = 9, },
> >> +    { .name = "cpubus160", .bit = 10, },
> >> +    { .name = "adsl", .bit = 11, },
> >> +    { .name = "sar124", .bit = 12, },
> >
> > Nit: this should be sar125
>
> Nice catch, I will fix this in v2.
>
> >
> >> +    { .name = "mips", .bit = 13, .flags = CLK_IS_CRITICAL, },
> >> +    { .name = "pcie", .bit = 14, },
> >> +    { .name = "robosw250", .bit = 16, },
> >> +    { .name = "robosw025", .bit = 17, },
> >> +    { .name = "sdr", .bit = 19, .flags = CLK_IS_CRITICAL, },
> >> +    { .name = "usb", .bit = 20, },
> >
> > This should probably be "usbd" to indicate this is the USB device clock
> > (not host)
>
> Ok, I will change it. I got confused by the fact that both (usbd and usbh) were present on 6318_map_part.h:
> #define USBD_CLK_EN         (1 << 20)
> #define USBH_CLK_EN         (1 << 20)

Is there a datasheet to verify that?

>
> >
> > With that fixed:
> >
> > Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
> > --
> > Florian
>