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[114.171.61.116]) by smtp.googlemail.com with ESMTPSA id nl8sm5191620pjb.13.2020.06.10.02.08.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Jun 2020 02:08:55 -0700 (PDT) From: Daniel Palmer Cc: k@japko.eu, tim.bird@sony.com, daniel@0x0f.com, devicetree@vger.kernel.org, Daniel Palmer , Rob Herring , Russell King , Sam Ravnborg , Linus Walleij , Heiko Stuebner , Maxime Ripard , Lubomir Rintel , Stephan Gerhold , Mark Brown , allen , Mauro Carvalho Chehab , "David S. Miller" , Greg Kroah-Hartman , Jonathan Corbet , Arnd Bergmann , Andrew Morton , Doug Anderson , Benjamin Gaignard , Gregory Fong , Bartosz Golaszewski , Masahiro Yamada , Nick Desaulniers , Will Deacon , Nathan Huckleberry , Nathan Chancellor , Marc Zyngier , Ard Biesheuvel , =?UTF-8?q?Andreas=20F=C3=A4rber?= , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 3/5] ARM: mstar: Add infinity/mercury series dtsi Date: Wed, 10 Jun 2020 18:04:01 +0900 Message-Id: <20200610090421.3428945-4-daniel@0x0f.com> X-Mailer: git-send-email 2.27.0.rc0 In-Reply-To: <20191014061617.10296-2-daniel@0x0f.com> References: <20191014061617.10296-2-daniel@0x0f.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit To: unlisted-recipients:; (no To-header on input) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Adds initial dtsi for the base MStar ARMv7 SoCs, family dtsis for infinity and mercury families, and then some chip level dtsis for chips in those families. Signed-off-by: Daniel Palmer --- MAINTAINERS | 3 + arch/arm/boot/dts/infinity-msc313.dtsi | 14 +++++ arch/arm/boot/dts/infinity.dtsi | 10 ++++ arch/arm/boot/dts/infinity3-msc313e.dtsi | 14 +++++ arch/arm/boot/dts/infinity3.dtsi | 10 ++++ arch/arm/boot/dts/mercury5-ssc8336n.dtsi | 14 +++++ arch/arm/boot/dts/mercury5.dtsi | 10 ++++ arch/arm/boot/dts/mstar-v7.dtsi | 71 ++++++++++++++++++++++++ 8 files changed, 146 insertions(+) create mode 100644 arch/arm/boot/dts/infinity-msc313.dtsi create mode 100644 arch/arm/boot/dts/infinity.dtsi create mode 100644 arch/arm/boot/dts/infinity3-msc313e.dtsi create mode 100644 arch/arm/boot/dts/infinity3.dtsi create mode 100644 arch/arm/boot/dts/mercury5-ssc8336n.dtsi create mode 100644 arch/arm/boot/dts/mercury5.dtsi create mode 100644 arch/arm/boot/dts/mstar-v7.dtsi diff --git a/MAINTAINERS b/MAINTAINERS index 754521938303..839ae0250d3d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2114,6 +2114,9 @@ ARM/MStar/Sigmastar ARMv7 SoC support M: Daniel Palmer L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) S: Maintained +F: arch/arm/boot/dts/infinity*.dtsi +F: arch/arm/boot/dts/mercury*.dtsi +F: arch/arm/boot/dts/mstar-v7.dtsi F: arch/arm/mach-mstar/ F: Documentation/devicetree/bindings/arm/mstar.yaml diff --git a/arch/arm/boot/dts/infinity-msc313.dtsi b/arch/arm/boot/dts/infinity-msc313.dtsi new file mode 100644 index 000000000000..4eb522e6a75d --- /dev/null +++ b/arch/arm/boot/dts/infinity-msc313.dtsi @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2019 thingy.jp. + * Author: Daniel Palmer + */ + +#include "infinity.dtsi" + +/ { + memory { + device_type = "memory"; + reg = <0x20000000 0x4000000>; + }; +}; diff --git a/arch/arm/boot/dts/infinity.dtsi b/arch/arm/boot/dts/infinity.dtsi new file mode 100644 index 000000000000..25d379028689 --- /dev/null +++ b/arch/arm/boot/dts/infinity.dtsi @@ -0,0 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2019 thingy.jp. + * Author: Daniel Palmer + */ + +#include "mstar-v7.dtsi" + +/ { +}; diff --git a/arch/arm/boot/dts/infinity3-msc313e.dtsi b/arch/arm/boot/dts/infinity3-msc313e.dtsi new file mode 100644 index 000000000000..d0c53153faad --- /dev/null +++ b/arch/arm/boot/dts/infinity3-msc313e.dtsi @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2019 thingy.jp. + * Author: Daniel Palmer + */ + +#include "infinity3.dtsi" + +/ { + memory { + device_type = "memory"; + reg = <0x20000000 0x4000000>; + }; +}; diff --git a/arch/arm/boot/dts/infinity3.dtsi b/arch/arm/boot/dts/infinity3.dtsi new file mode 100644 index 000000000000..cf5f18a07835 --- /dev/null +++ b/arch/arm/boot/dts/infinity3.dtsi @@ -0,0 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2019 thingy.jp. + * Author: Daniel Palmer + */ + +#include "infinity.dtsi" + +/ { +}; diff --git a/arch/arm/boot/dts/mercury5-ssc8336n.dtsi b/arch/arm/boot/dts/mercury5-ssc8336n.dtsi new file mode 100644 index 000000000000..7513f903c838 --- /dev/null +++ b/arch/arm/boot/dts/mercury5-ssc8336n.dtsi @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2019 thingy.jp. + * Author: Daniel Palmer + */ + +#include "mercury5.dtsi" + +/ { + memory { + device_type = "memory"; + reg = <0x20000000 0x4000000>; + }; +}; diff --git a/arch/arm/boot/dts/mercury5.dtsi b/arch/arm/boot/dts/mercury5.dtsi new file mode 100644 index 000000000000..25d379028689 --- /dev/null +++ b/arch/arm/boot/dts/mercury5.dtsi @@ -0,0 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2019 thingy.jp. + * Author: Daniel Palmer + */ + +#include "mstar-v7.dtsi" + +/ { +}; diff --git a/arch/arm/boot/dts/mstar-v7.dtsi b/arch/arm/boot/dts/mstar-v7.dtsi new file mode 100644 index 000000000000..0fccc4ca52a4 --- /dev/null +++ b/arch/arm/boot/dts/mstar-v7.dtsi @@ -0,0 +1,71 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2019 thingy.jp. + * Author: Daniel Palmer + */ + +#include +#include + +/ { + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&gic>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x0>; + }; + }; + + arch_timer { + compatible = "arm,armv7-timer"; + interrupts = , + , + , + ; + clock-frequency = <6000000>; + }; + + pmu { + compatible = "arm,cortex-a7-pmu"; + interrupts = , + , + , + ; + }; + + soc: soc { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + gic: interrupt-controller@16001000 { + compatible = "arm,cortex-a7-gic"; + #interrupt-cells = <3>; + #address-cells = <1>; + #size-cells = <1>; + interrupt-controller; + reg = <0x16001000 0x1000>, + <0x16002000 0x1000>; + }; + + pm_uart: uart@1f221000 { + compatible = "ns16550a"; + reg = <0x1f221000 0x100>; + reg-shift = <3>; + clock-frequency = <172000000>; + status = "disabled"; + }; + }; +}; -- 2.27.0.rc0