Received: by 2002:a25:683:0:0:0:0:0 with SMTP id 125csp814858ybg; Wed, 10 Jun 2020 14:39:04 -0700 (PDT) X-Google-Smtp-Source: ABdhPJybTvfq3d+aHtstEmUUU6UuPb35fHmxlR2iRBq0Es8XdVHWzbOUCHqd8xz6NFxzoNQbd1nW X-Received: by 2002:a05:6402:1285:: with SMTP id w5mr4353386edv.73.1591825143938; Wed, 10 Jun 2020 14:39:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1591825143; cv=none; d=google.com; s=arc-20160816; b=uuJogbqXAZsUeTJyY+FrttXpH5rIQcAZnXQHvTqJKxji9BNR0pgzMl8td51hNiH5AB +TEk58DntO9cZcRpqojO/Et6XJ4/se7HOOGgCiyHi3pk2q2QPR569N+KLDs19UpWTA+g h1k92Nd9sARnl837O4pyjVglP5wG9Ma0VJlTFTgffB4Jts4GO+6Q3RJWqcVfF/x1cLm/ S+FoXLCPS6tuVoHCUcvt4qOlfPo60AfPRutYvewE5t6LiJFnSLjiMnW7yGMzBh8ruA/a C+WaexcOTynZNHyme69GRLsCHPSHkVyt6rFQQHfp7uXs01L4SMoSNQEx4oznvTmLXTxj jjcw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:message-id:date:references :in-reply-to:subject:cc:to:from; bh=ahbr2bJgpIhoP0Lvd37SD4mp8Xg1Bx1Z3O1Ph8gdD1I=; b=eFm9oUDNwcY2FuCyZA7lhKoHjS6Nb0JAs2no6MmKT619IT8oM43+qbDeasspzLmGnC MPlDu/TOxdhr3RI/r15LFJsnS6fGT/wU7i4Jqe5vHJ/r6PTpmA6KEQcrCqRZ/0ZanwUk z0ewMp3FB/Ti3+hsgM2P3AtydCFo2iSHmihWWhT0BP9eApoBaaGE0/XCtQYGxiSbWaWd YREox8T/tYshyVO46z6SbcR0Akr6BJT25P93K3Q/rw0eeLkECq5xKiWIG46qxSLB9YBp tSCBypZiu3A7RcUCdai4evXRoOADhyLZGNJJpQMaFsNK92Q+7LhgGOkVFEWeC88EQJl0 1CgQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id q5si525562edn.1.2020.06.10.14.38.40; Wed, 10 Jun 2020 14:39:03 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726294AbgFJVeo (ORCPT + 99 others); Wed, 10 Jun 2020 17:34:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44866 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726114AbgFJVeo (ORCPT ); Wed, 10 Jun 2020 17:34:44 -0400 Received: from Galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C33C5C03E96B for ; Wed, 10 Jun 2020 14:34:43 -0700 (PDT) Received: from p5de0bf0b.dip0.t-ipconnect.de ([93.224.191.11] helo=nanos.tec.linutronix.de) by Galois.linutronix.de with esmtpsa (TLS1.2:DHE_RSA_AES_256_CBC_SHA256:256) (Exim 4.80) (envelope-from ) id 1jj8MX-00045z-RH; Wed, 10 Jun 2020 23:34:22 +0200 Received: by nanos.tec.linutronix.de (Postfix, from userid 1000) id 403D61013D0; Wed, 10 Jun 2020 23:34:21 +0200 (CEST) From: Thomas Gleixner To: "David P. Reed" , dpreed@deepplum.com Cc: Ingo Molnar , Borislav Petkov , x86@kernel.org, "H. Peter Anvin" , Allison Randal , Enrico Weigelt , Greg Kroah-Hartman , Kate Stewart , "Peter Zijlstra \(Intel\)" , Randy Dunlap , Martin Molnar , Andy Lutomirski , Alexandre Chartre , Jann Horn , Dave Hansen , linux-kernel@vger.kernel.org Subject: Re: [PATCH] Fix undefined operation VMXOFF during reboot and crash In-Reply-To: <20200610181254.2142-1-dpreed@deepplum.com> References: <20200610181254.2142-1-dpreed@deepplum.com> Date: Wed, 10 Jun 2020 23:34:21 +0200 Message-ID: <878sgufvvm.fsf@nanos.tec.linutronix.de> MIME-Version: 1.0 Content-Type: text/plain X-Linutronix-Spam-Score: -1.0 X-Linutronix-Spam-Level: - X-Linutronix-Spam-Status: No , -1.0 points, 5.0 required, ALL_TRUSTED=-1,SHORTCIRCUIT=-0.0001 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org "David P. Reed" writes: > +/* > + * Fix any unwanted undefined operation fault due to VMXOFF instruction that > + * is needed to ensure that CPU is not in VMX root operation at time of > + * a reboot/panic CPU reset. There is no safe and reliable way to know > + * if a processor is in VMX root operation, other than to skip the > + * VMXOFF. It is safe to just skip any VMXOFF that might generate this > + * exception, when VMX operation is enabled in CR4. In the extremely > + * rare case that a VMXOFF is erroneously executed while VMX is enabled, > + * but VMXON has not been executed yet, the undefined opcode fault > + * should not be missed by valid code, though it would be an error. > + * To detect this, we could somehow restrict the instruction address > + * to the specific use during reboot/panic. > + */ > +static int fixup_emergency_vmxoff(struct pt_regs *regs, int trapnr) > +{ > + const static u8 insn_vmxoff[3] = { 0x0f, 0x01, 0xc4 }; > + u8 ud[3]; > + > + if (trapnr != X86_TRAP_UD) > + return 0; > + if (!cpu_vmx_enabled()) > + return 0; > + if (!this_cpu_read(doing_emergency_vmxoff)) > + return 0; > + > + /* undefined instruction must be in kernel and be VMXOFF */ > + if (regs->ip < TASK_SIZE_MAX) > + return 0; > + if (probe_kernel_address((u8 *)regs->ip, ud)) > + return 0; > + if (memcmp(ud, insn_vmxoff, sizeof(insn_vmxoff))) > + return 0; > + > + regs->ip += sizeof(insn_vmxoff); > + return 1; We have exception fixups to avoid exactly that kind of horrible workarounds all over the place. static inline int cpu_vmxoff_safe(void) { int err; asm volatile("2: vmxoff; xor %[err],%[err]\n" "1:\n\t" ".section .fixup,\"ax\"\n\t" "3: mov %[fault],%[err] ; jmp 1b\n\t" ".previous\n\t" _ASM_EXTABLE(2b, 3b) : [err] "=a" (err) : [fault] "i" (-EFAULT) : "memory"); return err; } static inline void __cpu_emergency_vmxoff(void) { if (!cpu_vmx_enabled()) return; if (!cpu_vmxoff_safe()) cr4_clear_bits(X86_CR4_VMXE); } Problem solved. Thanks, tglx