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[23.128.96.18]) by mx.google.com with ESMTP id h3si2021922edz.291.2020.06.11.12.24.14; Thu, 11 Jun 2020 12:24:37 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20161025 header.b=oxsWQEUn; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726380AbgFKSuD (ORCPT + 99 others); Thu, 11 Jun 2020 14:50:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43770 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726292AbgFKSuD (ORCPT ); Thu, 11 Jun 2020 14:50:03 -0400 Received: from mail-pl1-x644.google.com (mail-pl1-x644.google.com [IPv6:2607:f8b0:4864:20::644]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 66A89C08C5C1 for ; Thu, 11 Jun 2020 11:50:03 -0700 (PDT) Received: by mail-pl1-x644.google.com with SMTP id x11so2653442plv.9 for ; Thu, 11 Jun 2020 11:50:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=0HOxmX84CtOBZELFo2yLdhQ76D4cXxjqf83woFragKk=; b=oxsWQEUnqGUCXsQYu4Q4x7fbNFwOw7SuMdOl2l++cT3hILmvMY43Cvlvc01lQcNDq6 EgiVfO3Em6SfYWGww+r6raQdqBbm9Aqqap+8XWBkuPoYyG7bP85i6gV0TCm3FndV+bnU fz9L/NdwwXaCqNvr1QJGjDquY1L6DPen4q3Gy8ppp5emfJsw3oxr/kGuw92STRey/iLN 1o6WGWm4rspjzYqfxh0VyYljMtSYn0iIresX7/RdLCt5KB/JRotFSmB9xzK3gC4GvbMf 7T+Ao/6ynTLcC1eq+v+TK+5wuCcAtn+gBl6P8br8V+fXY8dIL9NMY1P3avrVq9o5JVCA KgvA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=0HOxmX84CtOBZELFo2yLdhQ76D4cXxjqf83woFragKk=; b=EC016hVi1w7W3Mxj0zgjsStTqfEuZc5Z0aqYH/seAv3/nTofyx1G8NsfGSRHwT/r3t /pdg0K99e+soLQWrlcOhMo3yiFcp9noWQg3jLxU1wtFyd8G6tf40kOvrzQrJwqu3iLDY E7yeIF9DGqHQCTxgFIPj7HRiESjHlQAv6mIQIln1Vc3BhpnWUjWaVLjwQZIhJkHQJ8B4 aQoTEqs8ticOOgu8ty+sLgVteBimrgsL2LlNV5MrgLO97v1SlAN5Sj2/qeDEWfxcJOEK r38Fc4JyDpDm7785bZZs/I11EqMXiCFeFDmWoeDayeqtkfS2IedPXeAa7C7oWUaYqgyv wPDg== X-Gm-Message-State: AOAM5335/jMQ7qzaPIWaOYKza+Fv/t/91R9jogfuzV+XPJ/cbQ/HZvkK 7i9Bm91jhX/26mosFBKzzAi8OzKr8rbLeXyHdnSHTw== X-Received: by 2002:a17:90a:1e:: with SMTP id 30mr8711851pja.25.1591901402456; Thu, 11 Jun 2020 11:50:02 -0700 (PDT) MIME-Version: 1.0 References: <20200611183235.37508-1-nhuck@google.com> In-Reply-To: <20200611183235.37508-1-nhuck@google.com> From: Nick Desaulniers Date: Thu, 11 Jun 2020 11:49:51 -0700 Message-ID: Subject: Re: [PATCH] riscv/atomic: Fix sign extension for RV64I To: Nathan Huckleberry Cc: Paul Walmsley , Palmer Dabbelt , Albert Ou , linux-riscv@lists.infradead.org, LKML , clang-built-linux Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Jun 11, 2020 at 11:34 AM 'Nathan Huckleberry' via Clang Built Linux wrote: > > The argument passed to cmpxchg is not guaranteed to be sign > extended, but lr.w sign extends on RV64I. I had a hard time finding documentation on this sign extension. Is lr.w just the atomic version of lw? https://content.riscv.org/wp-content/uploads/2019/06/riscv-spec.pdf pdf page 54, printed page 38 says: The LW instruction loads a 32-bit value from memory and sign-extends this to 64 bits before storing it in register rd for RV64I. > This makes cmpxchg > fail on clang built kernels when __old is negative. > > To fix this, we just cast __old to long which sign extends on > RV64I. With this fix, clang built RISC-V kernels now boot. Oh, indeed, nice! Thanks for digging into this issue, and sending the patch. Tested-by: Nick Desaulniers # QEMU boot, clang build > > Link: https://github.com/ClangBuiltLinux/linux/issues/867 > Cc: clang-built-linux@googlegroups.com > Signed-off-by: Nathan Huckleberry > --- > arch/riscv/include/asm/cmpxchg.h | 8 ++++---- > 1 file changed, 4 insertions(+), 4 deletions(-) > > diff --git a/arch/riscv/include/asm/cmpxchg.h b/arch/riscv/include/asm/cmpxchg.h > index d969bab4a26b..262e5bbb2776 100644 > --- a/arch/riscv/include/asm/cmpxchg.h > +++ b/arch/riscv/include/asm/cmpxchg.h > @@ -179,7 +179,7 @@ > " bnez %1, 0b\n" \ > "1:\n" \ > : "=&r" (__ret), "=&r" (__rc), "+A" (*__ptr) \ > - : "rJ" (__old), "rJ" (__new) \ > + : "rJ" ((long)__old), "rJ" (__new) \ > : "memory"); \ > break; \ > case 8: \ > @@ -224,7 +224,7 @@ > RISCV_ACQUIRE_BARRIER \ > "1:\n" \ > : "=&r" (__ret), "=&r" (__rc), "+A" (*__ptr) \ > - : "rJ" (__old), "rJ" (__new) \ > + : "rJ" ((long)__old), "rJ" (__new) \ > : "memory"); \ > break; \ > case 8: \ > @@ -270,7 +270,7 @@ > " bnez %1, 0b\n" \ > "1:\n" \ > : "=&r" (__ret), "=&r" (__rc), "+A" (*__ptr) \ > - : "rJ" (__old), "rJ" (__new) \ > + : "rJ" ((long)__old), "rJ" (__new) \ > : "memory"); \ > break; \ > case 8: \ > @@ -316,7 +316,7 @@ > " fence rw, rw\n" \ > "1:\n" \ > : "=&r" (__ret), "=&r" (__rc), "+A" (*__ptr) \ > - : "rJ" (__old), "rJ" (__new) \ > + : "rJ" ((long)__old), "rJ" (__new) \ > : "memory"); \ > break; \ > case 8: \ > -- -- Thanks, ~Nick Desaulniers