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Date:   Tue, 16 Jun 2020 00:41:45 +0100
From:   Mark Brown <broonie@kernel.org>
To:     Tim Harvey <tharvey@gateworks.com>, linux-spi@vger.kernel.org,
        Robert Richter <rrichter@marvell.com>
Cc:     linux-kernel@vger.kernel.org
In-Reply-To: <1590680799-5640-1-git-send-email-tharvey@gateworks.com>
References: <1590680799-5640-1-git-send-email-tharvey@gateworks.com>
Subject: Re: [RFC PATCH] spi: spi-cavium-thunderx: flag controller as half duplex
Message-Id: <159226448569.27735.14957300459470061468.b4-ty@kernel.org>
Sender: linux-kernel-owner@vger.kernel.org
Precedence: bulk

On Thu, 28 May 2020 08:46:39 -0700, Tim Harvey wrote:
> The OcteonTX (TX1/ThunderX) SPI controller does not support full
> duplex transactions. Set the appropriate flag such that the spi
> core will return -EINVAL on such transactions requested by chip
> drivers.
> 
> This is an RFC as I need someone from Marvell/Cavium to confirm
> if this driver is used for other silicon that does support
> full duplex transfers (in which case we will need to identify
> that we are running on the ThunderX arch before setting the flag).

Applied to

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next

Thanks!

[1/1] spi: spi-cavium-thunderx: flag controller as half duplex
      commit: e8510d43f219beff1f426080049a5462148afd2f

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark