Received: by 2002:a05:6902:102b:0:0:0:0 with SMTP id x11csp422345ybt; Wed, 17 Jun 2020 04:43:50 -0700 (PDT) X-Google-Smtp-Source: ABdhPJw1OqW2o/Rcc4SFr8SsZRpNE0cltVF4CD91GMZXJQMKgR4ahV79teOFeki1Oc2hA4NbLPbq X-Received: by 2002:aa7:c607:: with SMTP id h7mr7007356edq.214.1592394230749; Wed, 17 Jun 2020 04:43:50 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1592394230; cv=none; d=google.com; s=arc-20160816; b=aKSP3+PqPYTixi+7XOHXsHpBvef9tEakROkT0feu/zgJdFiUWLJf2VqkVXkmlDBWSB HbxuOkgOR52+G9qkQkUdONAIukBtq8NRWP67GF6m3Ka4R/GZnqbynMpNrSzT4CPyzQk9 Uf5QWbl5LR7xmuJqcaztfKqCIYC0cS/CURPs+LIBQfJM8ZSJUbzedswJ27+ViDhvvxeG KPnoZ8if1xEjXvHvT2VGNQw8om3az0yML+5d6Rtz5si33bdaFCbiXIxs/JwdkTwMbHsy k2nwT/xWcF6vqSD13TLH15M0xmBWYPIGU0nANAeA1ZFrGFXI7hQGBnZ186Bkuu3CJklH c8Tw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=pPqzkpru4KoszvgMH3gXh0ur8OvLFPrunm3xcdkmwwo=; b=YU/caJQvlyRT/mzW+EPl1vVV/NpgtBkgj7prwjZ6mHKpa/dX7XqfbqSKqFi3G3bBN5 lPn6hfOEpzmFz5Z8+Gmz4Gg+zV3DlBoRtzwLVYU/3tDpqwXxm53P/WZQq3Yt+HVauUyO HJ2OmbxHqgxEVzrXqPFiLgDn4vy5kYcwBdO9cVhs2NQIkXYM+/jhURD4QkBBSj5D4EvH n3KLNaL+fGrRFkrAsECYwqnAyVKqREkbYuxL6PqehzgMbj9645OmtG8sf7hYGNWRivT/ gpMvhYsTKtg3jwT4Cd5mlPXMSslikUog0wqo76bEXUS1l5gFoul5Twe5NJHQjYp+zcCy eaOg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id a8si13113206edq.164.2020.06.17.04.43.28; Wed, 17 Jun 2020 04:43:50 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726981AbgFQLid (ORCPT + 99 others); Wed, 17 Jun 2020 07:38:33 -0400 Received: from foss.arm.com ([217.140.110.172]:56256 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726934AbgFQLi1 (ORCPT ); Wed, 17 Jun 2020 07:38:27 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D59AB1045; Wed, 17 Jun 2020 04:38:26 -0700 (PDT) Received: from monolith.arm.com (unknown [10.37.8.7]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 6640B3F71F; Wed, 17 Jun 2020 04:38:24 -0700 (PDT) From: Alexandru Elisei To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: maz@kernel.org, will@kernel.org, catalin.marinas@arm.com, mark.rutland@arm.com, Julien Thierry , Will Deacon , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Alexander Shishkin , Jiri Olsa , Namhyung Kim Subject: [PATCH v5 3/7] arm64: perf: Remove PMU locking Date: Wed, 17 Jun 2020 12:38:47 +0100 Message-Id: <20200617113851.607706-4-alexandru.elisei@arm.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200617113851.607706-1-alexandru.elisei@arm.com> References: <20200617113851.607706-1-alexandru.elisei@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Julien Thierry The PMU is disabled and enabled, and the counters are programmed from contexts where interrupts or preemption is disabled. The functions to toggle the PMU and to program the PMU counters access the registers directly and don't access data modified by the interrupt handler. That, and the fact that they're always called from non-preemptible contexts, means that we don't need to disable interrupts or use a spinlock. Cc: Will Deacon Cc: Mark Rutland Cc: Peter Zijlstra Cc: Ingo Molnar Cc: Arnaldo Carvalho de Melo Cc: Alexander Shishkin Cc: Jiri Olsa Cc: Namhyung Kim Cc: Catalin Marinas Signed-off-by: Julien Thierry [Explained why locking is not needed, removed WARN_ONs] Signed-off-by: Alexandru Elisei --- arch/arm64/kernel/perf_event.c | 28 ---------------------------- 1 file changed, 28 deletions(-) diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c index e95b5ca70a53..a6195022be7d 100644 --- a/arch/arm64/kernel/perf_event.c +++ b/arch/arm64/kernel/perf_event.c @@ -647,15 +647,10 @@ static inline u32 armv8pmu_getreset_flags(void) static void armv8pmu_enable_event(struct perf_event *event) { - unsigned long flags; - struct arm_pmu *cpu_pmu = to_arm_pmu(event->pmu); - struct pmu_hw_events *events = this_cpu_ptr(cpu_pmu->hw_events); - /* * Enable counter and interrupt, and set the counter to count * the event that we're interested in. */ - raw_spin_lock_irqsave(&events->pmu_lock, flags); /* * Disable counter @@ -678,21 +673,10 @@ static void armv8pmu_enable_event(struct perf_event *event) * Enable counter */ armv8pmu_enable_event_counter(event); - - raw_spin_unlock_irqrestore(&events->pmu_lock, flags); } static void armv8pmu_disable_event(struct perf_event *event) { - unsigned long flags; - struct arm_pmu *cpu_pmu = to_arm_pmu(event->pmu); - struct pmu_hw_events *events = this_cpu_ptr(cpu_pmu->hw_events); - - /* - * Disable counter and interrupt - */ - raw_spin_lock_irqsave(&events->pmu_lock, flags); - /* * Disable counter */ @@ -702,30 +686,18 @@ static void armv8pmu_disable_event(struct perf_event *event) * Disable interrupt for this counter */ armv8pmu_disable_event_irq(event); - - raw_spin_unlock_irqrestore(&events->pmu_lock, flags); } static void armv8pmu_start(struct arm_pmu *cpu_pmu) { - unsigned long flags; - struct pmu_hw_events *events = this_cpu_ptr(cpu_pmu->hw_events); - - raw_spin_lock_irqsave(&events->pmu_lock, flags); /* Enable all counters */ armv8pmu_pmcr_write(armv8pmu_pmcr_read() | ARMV8_PMU_PMCR_E); - raw_spin_unlock_irqrestore(&events->pmu_lock, flags); } static void armv8pmu_stop(struct arm_pmu *cpu_pmu) { - unsigned long flags; - struct pmu_hw_events *events = this_cpu_ptr(cpu_pmu->hw_events); - - raw_spin_lock_irqsave(&events->pmu_lock, flags); /* Disable all counters */ armv8pmu_pmcr_write(armv8pmu_pmcr_read() & ~ARMV8_PMU_PMCR_E); - raw_spin_unlock_irqrestore(&events->pmu_lock, flags); } static irqreturn_t armv8pmu_handle_irq(struct arm_pmu *cpu_pmu) -- 2.27.0