Received: by 2002:a05:6902:102b:0:0:0:0 with SMTP id x11csp1311133ybt; Thu, 18 Jun 2020 05:53:59 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzrWdlrFVCK2T98qu4tUssoYj7ovWr3aBCaH+DZ9LB8H4Shkk3dnPAedU1vwa5B6mV3j7cb X-Received: by 2002:a17:906:16d3:: with SMTP id t19mr3611753ejd.297.1592484839049; Thu, 18 Jun 2020 05:53:59 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1592484839; cv=none; d=google.com; s=arc-20160816; b=dlt7UqgBAW3kJ04KYsgcHomR4Tcl8B4w9M24244fd9r+rxV6KIN7s029AoIITqoE6o CLGs0oDWAjsQ5KveK9mxl+yhc7ETir/clkXn/xWCHj81lNNLUzMNiknWXdRCR5qTHcoK n8vnJdUlA09G8yPLHs6SvINyiowFIknFsyOiRPHIogVohWyH40HA2tftospozahJ/yAG 3JgY0OyEEMe9GIH4qvR6ia9hP8gjZkswCrVT9NXBiJGM7hdpVw+H7QKktc1ySF6BK8hM qTSwxeQLp4Azaq8d/wCI3EpC8wKQJidTaX1cRunXtk19J/3Q+AeYnJKsqZURbBWkdoCD cKeg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding :content-language:in-reply-to:mime-version:user-agent:date :message-id:subject:autocrypt:from:references:cc:to; bh=JCdWYj1jIofWDipZjHtFkty8KFabBGUf5owRg0PQgGA=; b=L70EqBPYn5NXtP3jpJZ8fjHp89jkW7BqW1btPlXtwxZJY3eX6vUUhTrcKi0aGza4it MaD+W4NuVo7oAIcj2lA4aDCSpj/vVUSvZRV1Fp+h8wF32eRpu8Vr82FtE2c3Ao7JDJKq Y4tfTJ2FKIGnY9qIj+zqkRdGmqX/A+5sgW8vFwJFH5W9aBSCV5o7sPM6+CIbXbzwDpRF zCy2yIk9+4sSav+5Qj+oXr7PP8lI731CulecjpVb83Lp4rnom2BMJ4COOdW46WY5pTyf NW2im2KQNubUkhGMloxph8TM/0lNf8SFeYP+ZCYGqO14D8xf5NBmNjSXcxwCVJ5MjPGz cYhQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=canonical.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id qp19si1813857ejb.142.2020.06.18.05.53.36; Thu, 18 Jun 2020 05:53:59 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=canonical.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729773AbgFRMun (ORCPT + 99 others); Thu, 18 Jun 2020 08:50:43 -0400 Received: from youngberry.canonical.com ([91.189.89.112]:51637 "EHLO youngberry.canonical.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730047AbgFRMui (ORCPT ); Thu, 18 Jun 2020 08:50:38 -0400 Received: from 1.general.cking.uk.vpn ([10.172.193.212]) by youngberry.canonical.com with esmtpsa (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.86_2) (envelope-from ) id 1jlu02-0000v3-SH; Thu, 18 Jun 2020 12:50:34 +0000 To: Liviu Dudau Cc: Brian Starkey , David Airlie , Daniel Vetter , dri-devel@lists.freedesktop.org, kernel-janitors@vger.kernel.org, linux-kernel@vger.kernel.org References: <20200618100400.11464-1-colin.king@canonical.com> <20200618121405.GJ159988@e110455-lin.cambridge.arm.com> From: Colin Ian King Autocrypt: addr=colin.king@canonical.com; prefer-encrypt=mutual; keydata= mQINBE6TJCgBEACo6nMNvy06zNKj5tiwDsXXS+LhT+LwtEsy9EnraKYXAf2xwazcICSjX06e fanlyhB0figzQO0n/tP7BcfMVNG7n1+DC71mSyRK1ZERcG1523ajvdZOxbBCTvTitYOy3bjs +LXKqeVMhK3mRvdTjjmVpWnWqJ1LL+Hn12ysDVVfkbtuIm2NoaSEC8Ae8LSSyCMecd22d9Pn LR4UeFgrWEkQsqROq6ZDJT9pBLGe1ZS0pVGhkRyBP9GP65oPev39SmfAx9R92SYJygCy0pPv BMWKvEZS/7bpetPNx6l2xu9UvwoeEbpzUvH26PHO3DDAv0ynJugPCoxlGPVf3zcfGQxy3oty dNTWkP6Wh3Q85m+AlifgKZudjZLrO6c+fAw/jFu1UMjNuyhgShtFU7NvEzL3RqzFf9O1qM2m uj83IeFQ1FZ65QAiCdTa3npz1vHc7N4uEQBUxyXgXfCI+A5yDnjHwzU0Y3RYS52TA3nfa08y LGPLTf5wyAREkFYou20vh5vRvPASoXx6auVf1MuxokDShVhxLpryBnlKCobs4voxN54BUO7m zuERXN8kadsxGFzItAyfKYzEiJrpUB1yhm78AecDyiPlMjl99xXk0zs9lcKriaByVUv/NsyJ FQj/kmdxox3XHi9K29kopFszm1tFiDwCFr/xumbZcMY17Yi2bQARAQABtCVDb2xpbiBLaW5n IDxjb2xpbi5raW5nQGNhbm9uaWNhbC5jb20+iQI2BBMBCAAhBQJOkyQoAhsDBQsJCAcDBRUK CQgLBRYCAwEAAh4BAheAAAoJEGjCh9/GqAImsBcP9i6C/qLewfi7iVcOwqF9avfGzOPf7CVr n8CayQnlWQPchmGKk6W2qgnWI2YLIkADh53TS0VeSQ7Tetj8f1gV75eP0Sr/oT/9ovn38QZ2 vN8hpZp0GxOUrzkvvPjpH+zdmKSaUsHGp8idfPpZX7XeBO0yojAs669+3BrnBcU5wW45SjSV nfmVj1ZZj3/yBunb+hgNH1QRcm8ZPICpjvSsGFClTdB4xu2AR28eMiL/TTg9k8Gt72mOvhf0 fS0/BUwcP8qp1TdgOFyiYpI8CGyzbfwwuGANPSupGaqtIRVf+/KaOdYUM3dx/wFozZb93Kws gXR4z6tyvYCkEg3x0Xl9BoUUyn9Jp5e6FOph2t7TgUvv9dgQOsZ+V9jFJplMhN1HPhuSnkvP 5/PrX8hNOIYuT/o1AC7K5KXQmr6hkkxasjx16PnCPLpbCF5pFwcXc907eQ4+b/42k+7E3fDA Erm9blEPINtt2yG2UeqEkL+qoebjFJxY9d4r8PFbEUWMT+t3+dmhr/62NfZxrB0nTHxDVIia u8xM+23iDRsymnI1w0R78yaa0Eea3+f79QsoRW27Kvu191cU7QdW1eZm05wO8QUvdFagVVdW Zg2DE63Fiin1AkGpaeZG9Dw8HL3pJAJiDe0KOpuq9lndHoGHs3MSa3iyQqpQKzxM6sBXWGfk EkK5Ag0ETpMkKAEQAMX6HP5zSoXRHnwPCIzwz8+inMW7mJ60GmXSNTOCVoqExkopbuUCvinN 4Tg+AnhnBB3R1KTHreFGoz3rcV7fmJeut6CWnBnGBtsaW5Emmh6gZbO5SlcTpl7QDacgIUuT v1pgewVHCcrKiX0zQDJkcK8FeLUcB2PXuJd6sJg39kgsPlI7R0OJCXnvT/VGnd3XPSXXoO4K cr5fcjsZPxn0HdYCvooJGI/Qau+imPHCSPhnX3WY/9q5/WqlY9cQA8tUC+7mgzt2VMjFft1h rp/CVybW6htm+a1d4MS4cndORsWBEetnC6HnQYwuC4bVCOEg9eXMTv88FCzOHnMbE+PxxHzW 3Gzor/QYZGcis+EIiU6hNTwv4F6fFkXfW6611JwfDUQCAHoCxF3B13xr0BH5d2EcbNB6XyQb IGngwDvnTyKHQv34wE+4KtKxxyPBX36Z+xOzOttmiwiFWkFp4c2tQymHAV70dsZTBB5Lq06v 6nJs601Qd6InlpTc2mjd5mRZUZ48/Y7i+vyuNVDXFkwhYDXzFRotO9VJqtXv8iqMtvS4xPPo 2DtJx6qOyDE7gnfmk84IbyDLzlOZ3k0p7jorXEaw0bbPN9dDpw2Sh9TJAUZVssK119DJZXv5 2BSc6c+GtMqkV8nmWdakunN7Qt/JbTcKlbH3HjIyXBy8gXDaEto5ABEBAAGJAh8EGAEIAAkF Ak6TJCgCGwwACgkQaMKH38aoAiZ4lg/+N2mkx5vsBmcsZVd3ys3sIsG18w6RcJZo5SGMxEBj t1UgyIXWI9lzpKCKIxKx0bskmEyMy4tPEDSRfZno/T7p1mU7hsM4owi/ic0aGBKP025Iok9G LKJcooP/A2c9dUV0FmygecRcbIAUaeJ27gotQkiJKbi0cl2gyTRlolKbC3R23K24LUhYfx4h pWj8CHoXEJrOdHO8Y0XH7059xzv5oxnXl2SD1dqA66INnX+vpW4TD2i+eQNPgfkECzKzGj+r KRfhdDZFBJj8/e131Y0t5cu+3Vok1FzBwgQqBnkA7dhBsQm3V0R8JTtMAqJGmyOcL+JCJAca 3Yi81yLyhmYzcRASLvJmoPTsDp2kZOdGr05Dt8aGPRJL33Jm+igfd8EgcDYtG6+F8MCBOult TTAu+QAijRPZv1KhEJXwUSke9HZvzo1tNTlY3h6plBsBufELu0mnqQvHZmfa5Ay99dF+dL1H WNp62+mTeHsX6v9EACH4S+Cw9Q1qJElFEu9/1vFNBmGY2vDv14gU2xEiS2eIvKiYl/b5Y85Q QLOHWV8up73KK5Qq/6bm4BqVd1rKGI9un8kezUQNGBKre2KKs6wquH8oynDP/baoYxEGMXBg GF/qjOC6OY+U7kNUW3N/A7J3M2VdOTLu3hVTzJMZdlMmmsg74azvZDV75dUigqXcwjE= Subject: Re: [PATCH] drm/arm: fix unintentional integer overflow on left shift Message-ID: <5d08fbec-75d8-d9a9-af61-e6ab98e77c80@canonical.com> Date: Thu, 18 Jun 2020 13:50:34 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.9.0 MIME-Version: 1.0 In-Reply-To: <20200618121405.GJ159988@e110455-lin.cambridge.arm.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 18/06/2020 13:14, Liviu Dudau wrote: > On Thu, Jun 18, 2020 at 11:04:00AM +0100, Colin King wrote: >> From: Colin Ian King > > Hi Colin, > >> >> Shifting the integer value 1 is evaluated using 32-bit arithmetic >> and then used in an expression that expects a long value leads to >> a potential integer overflow. > > I'm afraid this explanation makes no sense to me. Do you care to explain better what > you think the issue is? If the shift is done as 32-bit arithmetic and then promoted > to long how does the overflow happen? The shift is performed using 32 bit signed math and then assigned to an unsigned 64 bit long. This if the shift is 31 bits then the signed int conversion of 0x80000000 to unsigned long becomes 0xffffffff80000000. If the shift is more than 32 bits then result overflows and becomes 0x0. Colin > > Best regards, > Liviu > >> Fix this by using the BIT macro to >> perform the shift to avoid the overflow. >> >> Addresses-Coverity: ("Unintentional integer overflow") >> Fixes: ad49f8602fe8 ("drm/arm: Add support for Mali Display Processors") >> Signed-off-by: Colin Ian King >> --- >> drivers/gpu/drm/arm/malidp_planes.c | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/drivers/gpu/drm/arm/malidp_planes.c b/drivers/gpu/drm/arm/malidp_planes.c >> index 37715cc6064e..ab45ac445045 100644 >> --- a/drivers/gpu/drm/arm/malidp_planes.c >> +++ b/drivers/gpu/drm/arm/malidp_planes.c >> @@ -928,7 +928,7 @@ int malidp_de_planes_init(struct drm_device *drm) >> const struct malidp_hw_regmap *map = &malidp->dev->hw->map; >> struct malidp_plane *plane = NULL; >> enum drm_plane_type plane_type; >> - unsigned long crtcs = 1 << drm->mode_config.num_crtc; >> + unsigned long crtcs = BIT(drm->mode_config.num_crtc); >> unsigned long flags = DRM_MODE_ROTATE_0 | DRM_MODE_ROTATE_90 | DRM_MODE_ROTATE_180 | >> DRM_MODE_ROTATE_270 | DRM_MODE_REFLECT_X | DRM_MODE_REFLECT_Y; >> unsigned int blend_caps = BIT(DRM_MODE_BLEND_PIXEL_NONE) | >> -- >> 2.27.0.rc0 >> >