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[23.128.96.18]) by mx.google.com with ESMTP id i17si1987916ejo.179.2020.06.18.07.20.50; Thu, 18 Jun 2020 07:21:13 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730277AbgFROSW (ORCPT + 99 others); Thu, 18 Jun 2020 10:18:22 -0400 Received: from mga03.intel.com ([134.134.136.65]:3868 "EHLO mga03.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728340AbgFROST (ORCPT ); Thu, 18 Jun 2020 10:18:19 -0400 IronPort-SDR: 1PoJ4qzKIM8deSZtzmTrO0NTUE7emF8vNCevOnRf4qn7R+IOOOpojqrMMOSWNmw81JtPypTKWu HvCrsL363k6Q== X-IronPort-AV: E=McAfee;i="6000,8403,9655"; a="142528941" X-IronPort-AV: E=Sophos;i="5.73,526,1583222400"; d="scan'208";a="142528941" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Jun 2020 07:18:18 -0700 IronPort-SDR: Z3EwOfLlV2OW9hD3bZAORhaaaJXjZT3oK6CMXq2HjaoC/5xRKHBH8qvIpgsk9o744/qlyJ7jWT RvboVXVkhOdw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.73,526,1583222400"; d="scan'208";a="277637357" Received: from ryanr2x-mobl1.amr.corp.intel.com (HELO [10.255.0.133]) ([10.255.0.133]) by orsmga006.jf.intel.com with ESMTP; 18 Jun 2020 07:18:10 -0700 Subject: Re: [PATCH 2/4] KVM: x86: Introduce paravirt feature CR0/CR4 pinning To: John Andersen , corbet@lwn.net, pbonzini@redhat.com, tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, x86@kernel.org, hpa@zytor.com, shuah@kernel.org, sean.j.christopherson@intel.com, liran.alon@oracle.com, drjones@redhat.com, rick.p.edgecombe@intel.com, kristen@linux.intel.com Cc: vkuznets@redhat.com, wanpengli@tencent.com, jmattson@google.com, joro@8bytes.org, mchehab+huawei@kernel.org, gregkh@linuxfoundation.org, paulmck@kernel.org, pawan.kumar.gupta@linux.intel.com, jgross@suse.com, mike.kravetz@oracle.com, oneukum@suse.com, luto@kernel.org, peterz@infradead.org, fenghua.yu@intel.com, reinette.chatre@intel.com, vineela.tummalapalli@intel.com, dave.hansen@linux.intel.com, arjan@linux.intel.com, caoj.fnst@cn.fujitsu.com, bhe@redhat.com, nivedita@alum.mit.edu, keescook@chromium.org, dan.j.williams@intel.com, eric.auger@redhat.com, aaronlewis@google.com, peterx@redhat.com, makarandsonare@google.com, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, linux-kselftest@vger.kernel.org, kernel-hardening@lists.openwall.com References: <20200617190757.27081-1-john.s.andersen@intel.com> <20200617190757.27081-3-john.s.andersen@intel.com> From: Dave Hansen Autocrypt: addr=dave.hansen@intel.com; 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Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.8.0 MIME-Version: 1.0 In-Reply-To: <20200617190757.27081-3-john.s.andersen@intel.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 6/17/20 12:07 PM, John Andersen wrote: > +#define KVM_CR0_PIN_ALLOWED (X86_CR0_WP) > +#define KVM_CR4_PIN_ALLOWED (X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_UMIP) Why *is* there an allowed set? Why don't we just allow everything? Shouldn't we also pin any unknown bits? The CR4.FSGSBASE bit is an example of something that showed up CPUs without Linux knowing about it. If set, it causes problems. This set couldn't have helped FSGSBASE because it is not in the allowed set. Let's say Intel loses its marbles and adds a CR4 bit that lets userspace write to kernel memory. Linux won't set it, but an attacker would go after it, first thing.