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[76.210.143.223]) by smtp.gmail.com with ESMTPSA id n3sm3141734pgq.30.2020.06.18.14.53.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 18 Jun 2020 14:53:28 -0700 (PDT) Date: Thu, 18 Jun 2020 14:53:28 -0700 (PDT) X-Google-Original-Date: Thu, 18 Jun 2020 14:46:07 PDT (-0700) Subject: Re: [PATCH v2 1/1] riscv: Select ARCH_SUPPORTS_ATOMIC_RMW by default In-Reply-To: <20200605051510.51590-1-maochenxi@eswin.com> CC: Paul Walmsley , aou@eecs.berkeley.edu, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, maochenxi@eswin.com From: Palmer Dabbelt To: maochenxi@eswin.com Message-ID: Mime-Version: 1.0 (MHng) Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, 04 Jun 2020 22:15:10 PDT (-0700), maochenxi@eswin.com wrote: > Select ARCH_SUPPORTS_ATOMIC_RMW by default to enabel osqlocks. > > PS2: Add signed off info. > > Signed-off-by: Chenxi Mao > --- > arch/riscv/Kconfig | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig > index a31e1a41913a..cbdc605d20d9 100644 > --- a/arch/riscv/Kconfig > +++ b/arch/riscv/Kconfig > @@ -68,6 +68,7 @@ config RISCV > select ARCH_HAS_GCOV_PROFILE_ALL > select HAVE_COPY_THREAD_TLS > select HAVE_ARCH_KASAN if MMU && 64BIT > + select ARCH_SUPPORTS_ATOMIC_RMW > > config ARCH_MMAP_RND_BITS_MIN > default 18 if 64BIT Thanks, this is on for-next.