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Fri, 19 Jun 2020 10:46:32 +0000 Date: Fri, 19 Jun 2020 18:44:37 +0800 From: Jisheng Zhang To: Will Deacon , Robin Murphy , Mark Rutland , Catalin Marinas Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 0/3] arm64: perf: add support for Cortex-A55/A75/A76 Message-ID: <20200619184423.5e61a838@xhacker.debian> X-Mailer: Claws Mail 3.17.5 (GTK+ 2.24.32; x86_64-pc-linux-gnu) Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-ClientProxiedBy: TYBP286CA0040.JPNP286.PROD.OUTLOOK.COM (2603:1096:404:10a::28) To DM6PR03MB3580.namprd03.prod.outlook.com (2603:10b6:5:b2::14) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from xhacker.debian (124.74.246.114) by TYBP286CA0040.JPNP286.PROD.OUTLOOK.COM (2603:1096:404:10a::28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3109.22 via Frontend Transport; Fri, 19 Jun 2020 10:46:29 +0000 X-Mailer: Claws Mail 3.17.5 (GTK+ 2.24.32; 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X-MS-Exchange-AntiSpam-MessageData: 0w+L1WVUPlehHiypeJ7o1ibsC/7pRHCC4FHhAoKawwK5KUhWeGVTXDFwo+SwhTLD0Tz2bPLPFgX5JIfgsBZCKO5fby3r4BKoCAT0dc/vvtxL8DMm3HFqALQ5Sj0sfAJbRxxoZhSiFUYIzAhVYCDGeR0aa4/Iu6NyxsIF/loWXlt7i/V7MeFwuvJbBEqwgl45F70BqvLkdi4hefPQXXVnx0pxiLUpbjpP+Y8SJi9VZNiKo7LEIvU9JFw6HDHeJNPULNQEo2iQlj8q5sHklGMlrHIM/7z/+LdfiAEADlgex+89Bnmc6R8sUsmjFH8qyAFrVz2O7YgxLLNfTfX9XcXaFE0MTjU2+B0PREdjPx9a/B8DCmhXSeMgetR0zgeLH/EzYbfnGyF3sjv0IsVM/z5VeqCkUZvBwAEgcqai/D1Neu3Fr4QS6Wmd5L8YiIlweSfDHcwSeL0ObMJqzyi5R/laoPXOlTiK0WQxa8JGm/suqvpNlBKP+xdD0za4gVhe6B2K X-OriginatorOrg: synaptics.com X-MS-Exchange-CrossTenant-Network-Message-Id: 9173a735-979c-49d5-2a56-08d8143e07b3 X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Jun 2020 10:46:32.5373 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 335d1fbc-2124-4173-9863-17e7051a2a0e X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: n59/9kYHbA5llGvfBMgmLB9PuBRuSIcffTiuedfo6O8EgOtE2LmNNzH4zpenTqy2sz6DGlyPKECHrWcDTH6i3g== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR03MB3481 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The Cortex-A55/A75/A76 use some implementation defined perf events. Add the support. Jisheng Zhang (3): arm64: perf: add support for Cortex-A55 arm64: perf: add support for Cortex-A75 arm64: perf: add support for Cortex-A76 arch/arm64/kernel/perf_event.c | 49 +++++++++++++++++++++++++++++++--- 1 file changed, 45 insertions(+), 4 deletions(-) -- 2.27.0