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([2601:647:4700:9b2:f471:e6bc:7ad4:bb29]) by smtp.gmail.com with ESMTPSA id y10sm6933627pfq.34.2020.06.19.12.46.13 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Fri, 19 Jun 2020 12:46:13 -0700 (PDT) Content-Type: text/plain; charset=us-ascii Mime-Version: 1.0 (Mac OS X Mail 13.4 \(3608.80.23.2.2\)) Subject: Re: [kvm-unit-tests PATCH] x86: pmu: Test full-width counter writes support From: Nadav Amit In-Reply-To: <1272fbd7-3ff1-5eac-e9e2-78b824fbc4e0@redhat.com> Date: Fri, 19 Jun 2020 12:46:12 -0700 Cc: Thomas Huth , Like Xu , Sean Christopherson , Vitaly Kuznetsov , Wanpeng Li , Jim Mattson , Joerg Roedel , kvm@vger.kernel.org, linux-kernel@vger.kernel.org Content-Transfer-Encoding: 7bit Message-Id: References: <20200529074347.124619-1-like.xu@linux.intel.com> <20200529074347.124619-4-like.xu@linux.intel.com> <1272fbd7-3ff1-5eac-e9e2-78b824fbc4e0@redhat.com> To: Paolo Bonzini X-Mailer: Apple Mail (2.3608.80.23.2.2) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > On Jun 16, 2020, at 5:28 AM, Paolo Bonzini wrote: > > On 16/06/20 12:49, Thomas Huth wrote: >> On 29/05/2020 09.43, Like Xu wrote: >>> When the full-width writes capability is set, use the alternative MSR >>> range to write larger sign counter values (up to GP counter width). >>> >>> Signed-off-by: Like Xu >>> --- >>> lib/x86/msr.h | 1 + >>> x86/pmu.c | 125 ++++++++++++++++++++++++++++++++++++++++---------- >>> 2 files changed, 102 insertions(+), 24 deletions(-) >> [...] >>> @@ -452,6 +468,66 @@ static void check_running_counter_wrmsr(void) >>> report_prefix_pop(); >>> } >>> >>> +static void check_counters(void) >>> +{ >>> + check_gp_counters(); >>> + check_fixed_counters(); >>> + check_rdpmc(); >>> + check_counters_many(); >>> + check_counter_overflow(); >>> + check_gp_counter_cmask(); >>> + check_running_counter_wrmsr(); >>> +} >>> + >>> +static void do_unsupported_width_counter_write(void *index) >>> +{ >>> + wrmsr(MSR_IA32_PMC0 + *((int *) index), 0xffffff0123456789ull); >>> +} >>> + >>> +static void check_gp_counters_write_width(void) >>> +{ >>> + u64 val_64 = 0xffffff0123456789ull; >>> + u64 val_32 = val_64 & ((1ul << 32) - 1); >> Hi, >> >> this broke compilation on 32-bit hosts: >> >> https://travis-ci.com/github/huth/kvm-unit-tests/jobs/349654654#L710 >> >> Fix should be easy, I guess - either use 1ull or specify the mask >> 0xffffffff directly. > > Or > > u64 val_32 = (u64)(u32) val_64; > > I'll send a patch. I missed this correspondence, but while running the tests on 32-bit I encountered two additional cases of wrong masks that caused failures. I have sent a separate patch for your consideration.