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Date:   Fri, 19 Jun 2020 16:51:43 -0300
From:   Jason Gunthorpe <jgg@ziepe.ca>
To:     Felix Kuehling <felix.kuehling@amd.com>
Cc:     Alex Deucher <alexdeucher@gmail.com>,
        Jerome Glisse <jglisse@redhat.com>,
        linux-rdma <linux-rdma@vger.kernel.org>,
        Thomas =?utf-8?B?SGVsbHN0csO2bSAoSW50ZWwp?= 
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        "moderated list:DMA BUFFER SHARING FRAMEWORK" 
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        Thomas Hellstrom <thomas.hellstrom@intel.com>,
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        Daniel Vetter <daniel@ffwll.ch>,
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Subject: Re: [Linaro-mm-sig] [PATCH 04/18] dma-fence: prime lockdep
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On Fri, Jun 19, 2020 at 03:30:32PM -0400, Felix Kuehling wrote:
> We have a potential problem with CPU updating page tables while the GPU
> is retrying on page table entries because 64 bit CPU transactions don't
> arrive in device memory atomically.

Except for 32 bit platforms atomicity is guarenteed if you use uncached
writeq() to aligned addresses..

The linux driver model breaks of the writeX() stuff is not atomic.

Jason