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[23.128.96.18]) by mx.google.com with ESMTP id f9si5325028edx.175.2020.06.20.02.38.34; Sat, 20 Jun 2020 02:38:57 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@pm.me header.s=protonmail header.b=J6R89rH4; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=pm.me Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727899AbgFTJe7 (ORCPT + 99 others); Sat, 20 Jun 2020 05:34:59 -0400 Received: from mail-40136.protonmail.ch ([185.70.40.136]:42602 "EHLO mail-40136.protonmail.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726533AbgFTJe6 (ORCPT ); Sat, 20 Jun 2020 05:34:58 -0400 Date: Sat, 20 Jun 2020 09:34:51 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=pm.me; s=protonmail; t=1592645694; bh=AmHbVOMk66AqezIk6cxSXO5/iQAq0kMicOJudm4j0nU=; h=Date:To:From:Cc:Reply-To:Subject:In-Reply-To:References:From; b=J6R89rH4S6CN6c8EcCRqpTBc/YykQDuLfkKvjSsI1rswYs8WnzkV9UFia8TP/9Q9C qYbwmksLHPfDILMII95hmI3B1LLh9fJBBV0uKd+sjUKnRMyMtr60RdGXftYqxEhqTL ETxdshEhvF1O7yk1KHlL2g/x1+m8M0T3mSusHc9FXfwYEJAhnrq5tpOeT1BqN8MFDZ McbL8t2fEa99uzKDJb/LKkSIZlNsz36MTy2FjGPVkczwAr5x31PKa6JI36gv6Uztm+ /Pu/h3h31fuO8e8UzaJzTKpon3S90Y7pchsv8/9h/NpLajchj3OQmSRa970UkpBeUr zv2f4lnlN9DJg== To: Thomas Bogendoerfer From: Alexander Lobakin Cc: Alexandre Belloni , Paul Burton , Alexander Lobakin , linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org Reply-To: Alexander Lobakin Subject: [PATCH mips-next 2/3] MIPS: io: fix sparse flood on asm/io.h Message-ID: In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-1.2 required=7.0 tests=ALL_TRUSTED,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF shortcircuit=no autolearn=disabled version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on mail.protonmail.ch Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org MIPS MMIO macros for byteswapping from/to hardware endianness are a bit tricky because they use cpu_to_le{16,32,64}() in both directions. This generates a lot of questions from sparse as __le{16,32,64} types are 'restricted' and direct cast is forbidden in order to prevent messing up the byteorder. As MMIO ops are used in almost every single driver, this leads to console flooding and complicates bug hunting. We could fix it in a more proper way, i.e. separate from device / to device byteswap macros and expand __BUILD_MEMORY_*(), but this seems redundant and will produce code duplication. Instead, just expand the existing *ioswab*() macros with forced typecasting to stop floods. Signed-off-by: Alexander Lobakin --- .../include/asm/mach-cavium-octeon/mangle-port.h | 12 +++++++++--- arch/mips/include/asm/mach-generic/mangle-port.h | 12 ++++++------ arch/mips/include/asm/mach-ip27/mangle-port.h | 6 +++--- arch/mips/include/asm/mach-ip30/mangle-port.h | 6 +++--- arch/mips/include/asm/mach-ip32/mangle-port.h | 6 +++--- arch/mips/include/asm/mach-tx39xx/mangle-port.h | 6 +++--- arch/mips/include/asm/mach-tx49xx/mangle-port.h | 6 +++--- 7 files changed, 30 insertions(+), 24 deletions(-) diff --git a/arch/mips/include/asm/mach-cavium-octeon/mangle-port.h b/arch/= mips/include/asm/mach-cavium-octeon/mangle-port.h index 8ff2cbdf2c3e..239fcc874b99 100644 --- a/arch/mips/include/asm/mach-cavium-octeon/mangle-port.h +++ b/arch/mips/include/asm/mach-cavium-octeon/mangle-port.h @@ -48,11 +48,17 @@ static inline bool __should_swizzle_addr(u64 p) =20 # define ioswabb(a, x)=09=09(x) # define __mem_ioswabb(a, x)=09(x) -# define ioswabw(a, x)=09=09(__should_swizzle_bits(a) ? le16_to_cpu(x) : x= ) +# define ioswabw(a, x)=09=09(__should_swizzle_bits(a) ?=09=09\ +=09=09=09=09 le16_to_cpu((__force __le16)(x)) :=09\ +=09=09=09=09 (x)) # define __mem_ioswabw(a, x)=09(x) -# define ioswabl(a, x)=09=09(__should_swizzle_bits(a) ? le32_to_cpu(x) : x= ) +# define ioswabl(a, x)=09=09(__should_swizzle_bits(a) ?=09=09\ +=09=09=09=09 le32_to_cpu((__force __le32)(x)) :=09\ +=09=09=09=09 (x)) # define __mem_ioswabl(a, x)=09(x) -# define ioswabq(a, x)=09=09(__should_swizzle_bits(a) ? le64_to_cpu(x) : x= ) +# define ioswabq(a, x)=09=09(__should_swizzle_bits(a) ?=09=09\ +=09=09=09=09 le64_to_cpu((__force __le64)(x)) :=09\ +=09=09=09=09 (x)) # define __mem_ioswabq(a, x)=09(x) =20 #endif /* __ASM_MACH_GENERIC_MANGLE_PORT_H */ diff --git a/arch/mips/include/asm/mach-generic/mangle-port.h b/arch/mips/i= nclude/asm/mach-generic/mangle-port.h index e4daf163706c..77c65c294db6 100644 --- a/arch/mips/include/asm/mach-generic/mangle-port.h +++ b/arch/mips/include/asm/mach-generic/mangle-port.h @@ -29,11 +29,11 @@ =20 # define ioswabb(a, x)=09=09(x) # define __mem_ioswabb(a, x)=09(x) -# define ioswabw(a, x)=09=09le16_to_cpu(x) +# define ioswabw(a, x)=09=09le16_to_cpu((__force __le16)(x)) # define __mem_ioswabw(a, x)=09(x) -# define ioswabl(a, x)=09=09le32_to_cpu(x) +# define ioswabl(a, x)=09=09le32_to_cpu((__force __le32)(x)) # define __mem_ioswabl(a, x)=09(x) -# define ioswabq(a, x)=09=09le64_to_cpu(x) +# define ioswabq(a, x)=09=09le64_to_cpu((__force __le64)(x)) # define __mem_ioswabq(a, x)=09(x) =20 #else @@ -41,11 +41,11 @@ # define ioswabb(a, x)=09=09(x) # define __mem_ioswabb(a, x)=09(x) # define ioswabw(a, x)=09=09(x) -# define __mem_ioswabw(a, x)=09cpu_to_le16(x) +# define __mem_ioswabw(a, x)=09((__force u16)cpu_to_le16(x)) # define ioswabl(a, x)=09=09(x) -# define __mem_ioswabl(a, x)=09cpu_to_le32(x) +# define __mem_ioswabl(a, x)=09((__force u32)cpu_to_le32(x)) # define ioswabq(a, x)=09=09(x) -# define __mem_ioswabq(a, x)=09cpu_to_le64(x) +# define __mem_ioswabq(a, x)=09((__force u64)cpu_to_le64(x)) =20 #endif =20 diff --git a/arch/mips/include/asm/mach-ip27/mangle-port.h b/arch/mips/incl= ude/asm/mach-ip27/mangle-port.h index 27c56efa519f..f71c38bbfc2f 100644 --- a/arch/mips/include/asm/mach-ip27/mangle-port.h +++ b/arch/mips/include/asm/mach-ip27/mangle-port.h @@ -16,10 +16,10 @@ # define ioswabb(a, x)=09=09(x) # define __mem_ioswabb(a, x)=09(x) # define ioswabw(a, x)=09=09(x) -# define __mem_ioswabw(a, x)=09cpu_to_le16(x) +# define __mem_ioswabw(a, x)=09((__force u16)cpu_to_le16(x)) # define ioswabl(a, x)=09=09(x) -# define __mem_ioswabl(a, x)=09cpu_to_le32(x) +# define __mem_ioswabl(a, x)=09((__force u32)cpu_to_le32(x)) # define ioswabq(a, x)=09=09(x) -# define __mem_ioswabq(a, x)=09cpu_to_le64(x) +# define __mem_ioswabq(a, x)=09((__force u64)cpu_to_le64(x)) =20 #endif /* __ASM_MACH_IP27_MANGLE_PORT_H */ diff --git a/arch/mips/include/asm/mach-ip30/mangle-port.h b/arch/mips/incl= ude/asm/mach-ip30/mangle-port.h index f3e1262a2d5e..439c6a601830 100644 --- a/arch/mips/include/asm/mach-ip30/mangle-port.h +++ b/arch/mips/include/asm/mach-ip30/mangle-port.h @@ -13,10 +13,10 @@ #define ioswabb(a, x)=09=09(x) #define __mem_ioswabb(a, x)=09(x) #define ioswabw(a, x)=09=09(x) -#define __mem_ioswabw(a, x)=09cpu_to_le16(x) +#define __mem_ioswabw(a, x)=09((__force u16)cpu_to_le16(x)) #define ioswabl(a, x)=09=09(x) -#define __mem_ioswabl(a, x)=09cpu_to_le32(x) +#define __mem_ioswabl(a, x)=09((__force u32)cpu_to_le32(x)) #define ioswabq(a, x)=09=09(x) -#define __mem_ioswabq(a, x)=09cpu_to_le64(x) +#define __mem_ioswabq(a, x)=09((__force u64)cpu_to_le64(x)) =20 #endif /* __ASM_MACH_IP30_MANGLE_PORT_H */ diff --git a/arch/mips/include/asm/mach-ip32/mangle-port.h b/arch/mips/incl= ude/asm/mach-ip32/mangle-port.h index c5ef72ccb0d5..4bc3d20e8293 100644 --- a/arch/mips/include/asm/mach-ip32/mangle-port.h +++ b/arch/mips/include/asm/mach-ip32/mangle-port.h @@ -17,10 +17,10 @@ # define ioswabb(a, x)=09=09(x) # define __mem_ioswabb(a, x)=09(x) # define ioswabw(a, x)=09=09(x) -# define __mem_ioswabw(a, x)=09cpu_to_le16(x) +# define __mem_ioswabw(a, x)=09((__force u16)cpu_to_le16(x)) # define ioswabl(a, x)=09=09(x) -# define __mem_ioswabl(a, x)=09cpu_to_le32(x) +# define __mem_ioswabl(a, x)=09((__force u32)cpu_to_le32(x)) # define ioswabq(a, x)=09=09(x) -# define __mem_ioswabq(a, x)=09cpu_to_le64(x) +# define __mem_ioswabq(a, x)=09((__force u64)cpu_to_le64(x)) =20 #endif /* __ASM_MACH_IP32_MANGLE_PORT_H */ diff --git a/arch/mips/include/asm/mach-tx39xx/mangle-port.h b/arch/mips/in= clude/asm/mach-tx39xx/mangle-port.h index ab7a70bd895e..95be459950f7 100644 --- a/arch/mips/include/asm/mach-tx39xx/mangle-port.h +++ b/arch/mips/include/asm/mach-tx39xx/mangle-port.h @@ -14,11 +14,11 @@ extern unsigned long (*__swizzle_addr_b)(unsigned long = port); =20 #define ioswabb(a, x)=09=09(x) #define __mem_ioswabb(a, x)=09(x) -#define ioswabw(a, x)=09=09le16_to_cpu(x) +#define ioswabw(a, x)=09=09le16_to_cpu((__force __le16)(x)) #define __mem_ioswabw(a, x)=09(x) -#define ioswabl(a, x)=09=09le32_to_cpu(x) +#define ioswabl(a, x)=09=09le32_to_cpu((__force __le32)(x)) #define __mem_ioswabl(a, x)=09(x) -#define ioswabq(a, x)=09=09le64_to_cpu(x) +#define ioswabq(a, x)=09=09le64_to_cpu((__force __le64)(x)) #define __mem_ioswabq(a, x)=09(x) =20 #endif /* __ASM_MACH_TX39XX_MANGLE_PORT_H */ diff --git a/arch/mips/include/asm/mach-tx49xx/mangle-port.h b/arch/mips/in= clude/asm/mach-tx49xx/mangle-port.h index e061ef38fb5f..98c7abf4484a 100644 --- a/arch/mips/include/asm/mach-tx49xx/mangle-port.h +++ b/arch/mips/include/asm/mach-tx49xx/mangle-port.h @@ -16,12 +16,12 @@ extern u16 (*ioswabw)(volatile u16 *a, u16 x); extern u16 (*__mem_ioswabw)(volatile u16 *a, u16 x); #else -#define ioswabw(a, x)=09=09le16_to_cpu(x) +#define ioswabw(a, x)=09=09le16_to_cpu((__force __le16)(x)) #define __mem_ioswabw(a, x)=09(x) #endif -#define ioswabl(a, x)=09=09le32_to_cpu(x) +#define ioswabl(a, x)=09=09le32_to_cpu((__force __le32)(x)) #define __mem_ioswabl(a, x)=09(x) -#define ioswabq(a, x)=09=09le64_to_cpu(x) +#define ioswabq(a, x)=09=09le64_to_cpu((__force __le64)(x)) #define __mem_ioswabq(a, x)=09(x) =20 #endif /* __ASM_MACH_TX49XX_MANGLE_PORT_H */ --=20 2.27.0