Received: by 2002:a05:6902:102b:0:0:0:0 with SMTP id x11csp1359314ybt; Sat, 20 Jun 2020 08:12:14 -0700 (PDT) X-Google-Smtp-Source: ABdhPJx6ZceFJVgfNtRRINx0YJX4hi3zh4guCBEVNlpT9da1FHiw/RVlkfvwUbhJDKqCMeg919Oi X-Received: by 2002:a17:906:9a02:: with SMTP id ai2mr8093386ejc.97.1592665934026; Sat, 20 Jun 2020 08:12:14 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1592665934; cv=none; d=google.com; s=arc-20160816; b=PPZQ5y+425oOE6LRO12GHQXfN0SvJDu+1kxRtzfVuffJRHObx+/pKUnu7k1tS7x29Y wykJX3Aw68e7n0+onbP/Ok75BLX5sYvWRcm3V41Pj23lrvc5rSS0tCYnAm0ONXL1HJjO Y/FWRZ9+IUTNFuig/NJjRJu6Y9g2AMJlk9aHVuLjGxTE74nirIpzOodnAfpiJTRUcx11 dSvG3h2fuEUXv6oWA+D1IeM4RHudNW/Q2z2wUoHuu1sXwOjOczlxbjWYB/HIDYwatqlX Wo8K9T0y/5Fpr3jliSOvFbRRKOunrapP6xXqXWzuhqzufSAJ9BAFisfwDBOTuA8NjoxK dTog== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:in-reply-to:content-disposition :mime-version:references:message-id:subject:cc:to:from:date; bh=7E7s7EnrUWfyt0aPD06AQM6loQFPe+avbaFfDXdZH8Y=; b=xQNHrg+c5r8O/aiZJZ1kpYaHvSxVtrs0u0DE3S6WjHABBkPfXndm5o7kSRafsi2B+b PyLoo5YHn6+E/giOiKbM16uq+EJc9n10dj49LCbdkiGHlThpvBd6vL+BJWLLHF48obje FlK+L02k7JGHhk8r4O6jjgx0DKEFHyXDCElmcVja1rMluuAlzGMnlZg1qF0ZovZ2DqRK uo0wDaOK2JL7NOMGppa9R/37WRDg58g3Rx9c22DoOQnHvc2ys8eRNaUKYCLK1gEQW2mA gPxfuJJ5AhhqTvXqA0ccq18p6iqOOXth650ATE6Hnrnan1zXbAri2/0OPzpsym1exhG+ 7Ltg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id k11si6225871eji.338.2020.06.20.08.11.51; Sat, 20 Jun 2020 08:12:14 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728328AbgFTPKD (ORCPT + 99 others); Sat, 20 Jun 2020 11:10:03 -0400 Received: from vps0.lunn.ch ([185.16.172.187]:50106 "EHLO vps0.lunn.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728226AbgFTPKD (ORCPT ); Sat, 20 Jun 2020 11:10:03 -0400 Received: from andrew by vps0.lunn.ch with local (Exim 4.94) (envelope-from ) id 1jmf85-001PKY-4e; Sat, 20 Jun 2020 17:10:01 +0200 Date: Sat, 20 Jun 2020 17:10:01 +0200 From: Andrew Lunn To: Antoine Tenart Cc: davem@davemloft.net, f.fainelli@gmail.com, hkallweit1@gmail.com, richardcochran@gmail.com, alexandre.belloni@bootlin.com, UNGLinuxDriver@microchip.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, thomas.petazzoni@bootlin.com, allan.nielsen@microchip.com, foss@0leil.net Subject: Re: [PATCH net-next v3 5/8] net: phy: mscc: 1588 block initialization Message-ID: <20200620151001.GL304147@lunn.ch> References: <20200619122300.2510533-1-antoine.tenart@bootlin.com> <20200619122300.2510533-6-antoine.tenart@bootlin.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200619122300.2510533-6-antoine.tenart@bootlin.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Jun 19, 2020 at 02:22:57PM +0200, Antoine Tenart wrote: > From: Quentin Schulz > > This patch adds the first parts of the 1588 support in the MSCC PHY, > with registers definition and the 1588 block initialization. > > Those PHYs are distributed in hardware packages containing multiple > times the PHY. The VSC8584 for example is composed of 4 PHYs. With > hardware packages, parts of the logic is usually common and one of the > PHY has to be used for some parts of the initialization. Following this > logic, the 1588 blocks of those PHYs are shared between two PHYs and > accessing the registers has to be done using the "base" PHY of the > group. This is handled thanks to helpers in the PTP code (and locks). > We also need the MDIO bus lock while performing a single read or write > to the 1588 registers as the read/write are composed of multiple MDIO > transactions (and we don't want other threads updating the page). Locking sounds complex. I assume LOCKDEP was your friend in getting this correct and deadlock free. > + /* For multiple port PHYs; the MDIO address of the base PHY in the > + * pair of two PHYs that share a 1588 engine. PHY0 and PHY2 are coupled. > + * PHY1 and PHY3 as well. PHY0 and PHY1 are base PHYs for their > + * respective pair. There are some evil hardware engineers out there :-( It would be good it Richard gave this code a once over. Andrew