Received: by 2002:a05:6902:102b:0:0:0:0 with SMTP id x11csp2456645ybt; Sun, 21 Jun 2020 21:30:57 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzm+zoli6Q+9VPfKd68oMyru404OPr1N2u1+8pOkXPp/UKf8br0xm2xLW5MB5UJcT8aRIwg X-Received: by 2002:a05:6402:b37:: with SMTP id bo23mr15411404edb.24.1592800257639; Sun, 21 Jun 2020 21:30:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1592800257; cv=none; d=google.com; s=arc-20160816; b=0ID+d/4gmMIKXF3y5ey2Ajw+62BJaFVBT48EnvkY332O67rvaLEsAzC/y52NaaUUqZ j40Fc+QsO/+Lb1OI+UVxKi0DCv+cUAmUbNjzNnJlonzfvooR/AgRVzovgA/JwRxf5vbl iMgMAeCm8OCXo92EzFQNZvKy8L06nc+Ilmlj69j9g4MVLeVePEF2slkNmbJbSdQlG3Jh 0lVZNr2QEPckp+vzE6E81RXW4Kg3/0vujvnYyK2bvO6IFcwar2hqjT0EO1NaKz6fMlO8 g2JLJBO8I0/pUVlft22sQ4c4dXUxFSnBmbzdylg5xeU2zwlwAVykbzB3m3mJ5ZQNaDGy qB6Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:to:from; bh=dpl4Jynbmgu7W7Z71zEF3YwNq1ctpC0RQPHmYooYh8s=; b=ateDXjqk2Z5lDFY7yLnG9nEQd3fKtBYXmqRGmqD5bsEe3s0qHE9W5jgavlG4PVJBK8 c9YESGTWRjMPxopZHGsC1upQsHqo36AGkAnSvZCxYrhM4qE0saLLhNEw3w2OAPXT5ToQ 7iI0ZafIM3N7SIGRn+l763UlqJ9Q4tyAafZ9X58HJyvQz4b9KbZutPmRvCXcwmt0toTO u90h306PRR38cPH12sag4KWta0FABCPkf3Yj3XdgRBsdPtw1zpW6hLA4wo2rwkr/MdJc STOauA7xMl+8klrsGAuoQkjAIkfNi8BvlP0jgerGG0rommRU68B0r8ElUtXgKEjT9wcz j0Yw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id g21si253791ejr.275.2020.06.21.21.30.35; Sun, 21 Jun 2020 21:30:57 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726337AbgFVE2k (ORCPT + 99 others); Mon, 22 Jun 2020 00:28:40 -0400 Received: from alexa-out-sd-02.qualcomm.com ([199.106.114.39]:15666 "EHLO alexa-out-sd-02.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725767AbgFVE2i (ORCPT ); Mon, 22 Jun 2020 00:28:38 -0400 Received: from unknown (HELO ironmsg01-sd.qualcomm.com) ([10.53.140.141]) by alexa-out-sd-02.qualcomm.com with ESMTP; 21 Jun 2020 21:28:37 -0700 Received: from sivaprak-linux.qualcomm.com ([10.201.3.202]) by ironmsg01-sd.qualcomm.com with ESMTP; 21 Jun 2020 21:28:33 -0700 Received: by sivaprak-linux.qualcomm.com (Postfix, from userid 459349) id D187021844; Mon, 22 Jun 2020 09:58:31 +0530 (IST) From: Sivaprakash Murugesan To: agross@kernel.org, bjorn.andersson@linaro.org, mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org, sivaprak@codeaurora.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH V8 0/4] Add APSS clock controller support for IPQ6018 Date: Mon, 22 Jun 2020 09:58:08 +0530 Message-Id: <1592800092-20533-1-git-send-email-sivaprak@codeaurora.org> X-Mailer: git-send-email 2.7.4 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The CPU on Qualcomm's IPQ6018 devices are primarily fed by APSS PLL and XO, these are connected to a clock mux and enable block. This patch series adds support for these clocks and inturn enables clocks required for CPU freq. [V8] * In patch 1 changed compatible string from const to enum * Since this change is minimal retained Review tag from Rob * In patch 3 re added Ack from Rob [V7] * Removed dts patch from this series, will send that separately * Addressed Rob's minor comment on the binding * Patch 1 depends on a53 pll bindings https://lkml.org/lkml/2020/5/4/60 [V6] * Split mailbox driver from this series, mailbox changes will sent as a separate series * Addressed review comments from Stephen [V5] * Addressed Bjorn comments on apss clk and dt-bindings * Patch 2 depends on a53 pll dt-bindings https://www.spinics.net/lists/linux-clk/msg48358.html [V4] * Re-written PLL found on IPQ platforms as a separate driver * Addressed stephen's comments on apss clock controller and pll * Addressed Rob's review comments on bindings * moved a53 pll binding from this series as it is not applicable, will send it separately. [V3] * Fixed dt binding check error in patch2 dt-bindings: clock: Add YAML schemas for QCOM A53 PLL [V2] * Restructred the patch series as there are two different HW blocks, the mux and enable belongs to the apcs block and PLL has a separate HW block. * Converted qcom mailbox and qcom a53 pll documentation to yaml. * Addressed review comments from Stephen, Rob and Sibi where it is applicable. * Changed this cover letter to state the purpose of this patch series Sivaprakash Murugesan (4): dt-bindings: clock: add ipq6018 a53 pll compatible clk: qcom: Add ipq apss pll driver clk: qcom: Add DT bindings for ipq6018 apss clock controller clk: qcom: Add ipq6018 apss clock controller .../devicetree/bindings/clock/qcom,a53pll.yaml | 18 ++++ drivers/clk/qcom/Kconfig | 19 ++++ drivers/clk/qcom/Makefile | 2 + drivers/clk/qcom/apss-ipq-pll.c | 95 ++++++++++++++++++ drivers/clk/qcom/apss-ipq6018.c | 106 +++++++++++++++++++++ include/dt-bindings/clock/qcom,apss-ipq.h | 12 +++ 6 files changed, 252 insertions(+) create mode 100644 drivers/clk/qcom/apss-ipq-pll.c create mode 100644 drivers/clk/qcom/apss-ipq6018.c create mode 100644 include/dt-bindings/clock/qcom,apss-ipq.h -- 2.7.4