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[83.6.170.196]) by smtp.googlemail.com with ESMTPSA id lm22sm1523448ejb.109.2020.06.25.11.21.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 25 Jun 2020 11:21:32 -0700 (PDT) From: Konrad Dybcio To: skrzynka@konradybcio.pl Cc: Konrad Dybcio , Andy Gross , Bjorn Andersson , Rob Herring , Kees Cook , Anton Vorontsov , Colin Cross , Tony Luck , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 04/13] arm64: dts: qcom: bullhead: Move UART pinctrl to SoC Date: Thu, 25 Jun 2020 20:21:08 +0200 Message-Id: <20200625182118.131476-5-konradybcio@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200625182118.131476-1-konradybcio@gmail.com> References: <20200625182118.131476-1-konradybcio@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This pinout is common for every 8992-based device and should therefore reside in the SoC device tree. Also convert addresses into phandles. Signed-off-by: Konrad Dybcio --- .../boot/dts/qcom/msm8992-bullhead-rev-101.dts | 13 ++++--------- 1 file changed, 4 insertions(+), 9 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8992-bullhead-rev-101.dts b/arch/arm64/boot/dts/qcom/msm8992-bullhead-rev-101.dts index 4f70681e730d..5969b5cfdc85 100644 --- a/arch/arm64/boot/dts/qcom/msm8992-bullhead-rev-101.dts +++ b/arch/arm64/boot/dts/qcom/msm8992-bullhead-rev-101.dts @@ -23,15 +23,6 @@ chosen { stdout-path = "serial0:115200n8"; }; - soc { - serial@f991e000 { - status = "okay"; - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&blsp1_uart2_default>; - pinctrl-1 = <&blsp1_uart2_sleep>; - }; - }; - reserved-memory { #address-cells = <2>; #size-cells = <2>; @@ -48,6 +39,10 @@ ramoops@1ff00000 { }; }; +&blsp1_uart2 { + status = "okay"; +}; + &rpm_requests { pm8994-regulators { compatible = "qcom,rpm-pm8994-regulators"; -- 2.27.0