Received: by 2002:a05:6902:102b:0:0:0:0 with SMTP id x11csp2992527ybt; Mon, 29 Jun 2020 12:19:12 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwwWSiz62nHrJ2RDU3Gle2P39xCyYLzp+p3iomIvxM84bHb5zbVH2W0WH8umvZCGrQ+wft5 X-Received: by 2002:a17:906:1153:: with SMTP id i19mr3762000eja.69.1593458352346; Mon, 29 Jun 2020 12:19:12 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1593458352; cv=none; d=google.com; s=arc-20160816; b=FQimSR8JWMb/pIhvu6YF8t84QJcmlQ2PfLYSBTLd5W36A0z8Uf0Tw1YeGOAp73ZwNw MoL/m3TeH/xrvuGHS1ozLqaRF/+CvOwTtArm+QC9WIEbZg1PBxteup5NFRlRyvBG76fX jsDK9+KGdMMZAmTtcUyPEb2EjaSS5N2DyUUw0Ay1NlTUdWsqsPcmeL4HZPYqpGsG19jn YdZvQ8ubNuf0wXIB0+Z4h4rq8h3WcA14GE5/yl/ouIqnR2UTds6KbPqk/e7UrzyKengD oPKOXHfCYM2UTcnpN3bc+Wh3mLzoml/9BJVi4coxb2B9l6LFOVz2Jha1BxlxdFkD6cRf 1DrQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from:dkim-signature; bh=NZSAP0VK4SYDOh0T0LtsBtWLQdKPxcFXHeL6qGWpOK4=; b=bH+DrpOCPamH9QeTMa11LrYhpQtmrqEC8k51HHQwMSqhhHVgBt0NDN2I6p2OKHiBeq QA+V6laIiOv6PbYxPSla8kW22M5GZX884wrxI0hncJe3TcBoshJnOm6n3jB9P94uI8OE IsQBvFIvgiFcHiUX/zmwrKaMg1ogry1NE1SPA8RzsiIFvUIb5p0D1cjuiERtx+icLc/I aYKHScL/E71Ged+oI+Qm77LUlx1XnEL6E7/yDN2LiaauuVLPG4W1viaCvlmxDbyuWu7V 9jFifQFl/1iHannCX49GvcjYIRkhgsCP/mh+XZJUNRc0djY22ZCXVHsRXBdct4JIt3FL gDVg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass (test mode) header.i=@ideasonboard.com header.s=mail header.b=R6hORFB6; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id i7si359988ejo.684.2020.06.29.12.18.48; Mon, 29 Jun 2020 12:19:12 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass (test mode) header.i=@ideasonboard.com header.s=mail header.b=R6hORFB6; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731858AbgF2TP5 (ORCPT + 99 others); Mon, 29 Jun 2020 15:15:57 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43376 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731778AbgF2TOW (ORCPT ); Mon, 29 Jun 2020 15:14:22 -0400 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [IPv6:2001:4b98:dc2:55:216:3eff:fef7:d647]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F037EC0D941A for ; Mon, 29 Jun 2020 05:01:03 -0700 (PDT) Received: from pendragon.bb.dnainternet.fi (81-175-216-236.bb.dnainternet.fi [81.175.216.236]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 71B32299; Mon, 29 Jun 2020 14:01:01 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1593432061; bh=yIy9K+7ClpA1ADDfcNgfiybjcgQ2b9XnHSux5FHyNrg=; h=From:To:Cc:Subject:Date:From; b=R6hORFB6IlYoIM6WiTxrcE+/H9GvEpPxjoMUP0ua7h/6mnge6hZ2aPLlOhX3rVRVg UurJeXX44wOVhT/nJ5bJFxTN1FOOV432pdw6xeFsGbnTuvc4CDBc//PfZprh0F9EJH qRMMc7B+lmBtYUMZSpFQoR9C8JrgAxidElBx2boA= From: Laurent Pinchart To: linux-kernel@vger.kernel.org Cc: Kishon Vijay Abraham I , Anurag Kumar Vulisha , Michal Simek , Vinod Koul Subject: [PATCH v9 0/3] phy: zynqmp: Add PHY driver for the Xilinx ZynqMP Gigabit Transceiver Date: Mon, 29 Jun 2020 15:00:51 +0300 Message-Id: <20200629120054.29338-1-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.27.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hello, The patch series adds a PHY driver for the Xilinx ZynqMP gigabit serial transceivers (PS-GTR). The PS-GTR is a set of 4 PHYs that can be used by the PCIe, USB 3.0, DisplayPort, SATA and Ethernet controllers that are part of the Serial I/O Unit (SIOU). The code is based on a previous version sent by Anurag Kumar Vulisha and available at [1]. The DT bindings have been converted to YAML, and both the bindings and the driver have been considerably reworked (and simplified). The most notable changes is the removal of manual handling of the reset lines of the PHY users (which belongs to the PHY users themselves), and moving to the standard PHY .power_on() and .configure() operations to replace functions that were previously exported by the driver. Please see individual patches for a more detailed changelog. Compared to v8, the series has been rebased on phy/next, and a minor issue in MAINTAINERS has been fixed. [1] https://patchwork.kernel.org/cover/10735681/ Anurag Kumar Vulisha (2): dt-bindings: phy: Add DT bindings for Xilinx ZynqMP PSGTR PHY phy: zynqmp: Add PHY driver for the Xilinx ZynqMP Gigabit Transceiver Laurent Pinchart (1): arm64: dts: zynqmp: Add GTR transceivers .../bindings/phy/xlnx,zynqmp-psgtr.yaml | 105 ++ MAINTAINERS | 9 + arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 10 + drivers/phy/Kconfig | 1 + drivers/phy/Makefile | 3 +- drivers/phy/xilinx/Kconfig | 13 + drivers/phy/xilinx/Makefile | 3 + drivers/phy/xilinx/phy-zynqmp.c | 995 ++++++++++++++++++ include/dt-bindings/phy/phy.h | 1 + 9 files changed, 1139 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/phy/xlnx,zynqmp-psgtr.yaml create mode 100644 drivers/phy/xilinx/Kconfig create mode 100644 drivers/phy/xilinx/Makefile create mode 100644 drivers/phy/xilinx/phy-zynqmp.c -- Regards, Laurent Pinchart