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Date:   Mon, 29 Jun 2020 15:09:43 +0530
From:   Vinod Koul <vkoul@kernel.org>
To:     Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc:     linux-kernel@vger.kernel.org,
        Kishon Vijay Abraham I <kishon@ti.com>,
        Anurag Kumar Vulisha <anurag.kumar.vulisha@xilinx.com>,
        Michal Simek <michal.simek@xilinx.com>
Subject: Re: [PATCH v8 0/3] phy: zynqmp: Add PHY driver for the Xilinx ZynqMP
 Gigabit Transceiver
Message-ID: <20200629093943.GB2599@vkoul-mobl>
References: <20200513172239.26444-1-laurent.pinchart@ideasonboard.com>
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On 13-05-20, 20:22, Laurent Pinchart wrote:
> Hello,
> 
> The patch series adds a PHY driver for the Xilinx ZynqMP gigabit serial
> transceivers (PS-GTR). The PS-GTR is a set of 4 PHYs that can be used by
> the PCIe, USB 3.0, DisplayPort, SATA and Ethernet controllers that are
> part of the Serial I/O Unit (SIOU).
> 
> The code is based on a previous version sent by Anurag Kumar Vulisha and
> available at [1]. The DT bindings have been converted to YAML, and both
> the bindings and the driver have been considerably reworked (and
> simplified). The most notable changes is the removal of manual handling
> of the reset lines of the PHY users (which belongs to the PHY users
> themselves), and moving to the standard PHY .power_on() and .configure()
> operations to replace functions that were previously exported by the
> driver. Please see individual patches for a more detailed changelog.
> 
> Compared to v7, review comments on the PHY driver have been taken into
> account, and the DT bindings have switched to the GPL-2.0-only OR
> BSD-2-Clause license
> 
> The code is based on v5.6 and has been tested with DisplayPort on the
> Xilinx ZC106 board.

This (dt patch and 8.1 update) fails to apply for me, can you please
rebased on phy-next and resend. Also I saw this while trying to apply:

WARNING: Misordered MAINTAINERS entry - list 'S:' before 'T:'
#403: FILE: MAINTAINERS:18605:
+T:	git https://github.com/Xilinx/linux-xlnx.git
+S:	Supported

Thanks
-- 
~Vinod