Received: by 2002:a05:6902:102b:0:0:0:0 with SMTP id x11csp3394439ybt;
        Tue, 30 Jun 2020 01:25:33 -0700 (PDT)
X-Google-Smtp-Source: ABdhPJxS1nqh+HqrsN3PWUn6yK539yw3JZxrqLFd5vzFIZetANWfr+44US4mGPEPxKS5F0v3mrRV
X-Received: by 2002:a50:ee8d:: with SMTP id f13mr20421021edr.302.1593505533305;
        Tue, 30 Jun 2020 01:25:33 -0700 (PDT)
ARC-Seal: i=1; a=rsa-sha256; t=1593505533; cv=none;
        d=google.com; s=arc-20160816;
        b=JB/AMNkqMUq1fsbKuj3gB4wn5nlPsXbPfkSOGh7zy+3c/39ZANdqJuJNAO/nQvWYGG
         T0er6iZu6/MnpaJyQDDmbjtU7aMwTXUt8eKBm8Sa+TGU54yXwXkaAasByAGPTKH7pt3J
         Nn7k6jXSnk4y5bOr8YYwx81CN9LuQ8VBjIk6J+uZqyI6EITeCZy+QLcbwIrAgmIenM6B
         WiRosUHxZIs/LKTvpHq1ewSIJAXIm3uW+Ur2aF9kOlbHLRhc4gCNUDCkUdUl0l6YqZI+
         60e1ndKW6jvv2GjvDa3I5H1zeN6PPxvnGy/p4qWGthkf0huBgCSUGdzP7FrKKLiJ6/xE
         Z+mg==
ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816;
        h=list-id:precedence:sender:dkim-signature:content-transfer-encoding
         :content-language:in-reply-to:mime-version:user-agent:date
         :message-id:from:references:cc:to:subject;
        bh=DQaMRKB84VIKK0yEyIitEMeud5u93A+msqcYYHv6p/c=;
        b=tndrVVr28h6sJa5r6HneyV6bRGKWc843ZuixWdOO5UKkUrujs1S20Wl+aUSGFhVp5Y
         XOftwoBo4nfBKefvDgHwdlD1ve8wjrAG7Yin7EfoNMjGJi8u1qy03Jyw+dLu42LpF7If
         njGwJjPayX5KgP61+3xgIhUIVKVIKCBhV5A1Plo+472nU9a4n71dVXTZuPT5U3ac6CxM
         cqHz5AbSsHxIqtwnQa7UUuFISLoUuCEwyGn9ZN+sQTzr5Z4CSTsOdYoE1xVtEfg00VmV
         5SIo5uf7sYJUT06NBrykdCu3qBjh3RJWsvXI5zLR1VWeb0LKnVDHwiCRnMQCTiuAVNgb
         wyjw==
ARC-Authentication-Results: i=1; mx.google.com;
       dkim=pass header.i=@nvidia.com header.s=n1 header.b=ScsXCOaL;
       spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org;
       dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=nvidia.com
Return-Path: <linux-kernel-owner@vger.kernel.org>
Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18])
        by mx.google.com with ESMTP id dr12si1591486ejc.352.2020.06.30.01.25.10;
        Tue, 30 Jun 2020 01:25:33 -0700 (PDT)
Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18;
Authentication-Results: mx.google.com;
       dkim=pass header.i=@nvidia.com header.s=n1 header.b=ScsXCOaL;
       spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org;
       dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=nvidia.com
Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand
        id S1731393AbgF3IVW (ORCPT <rfc822;ttoukan.linux@gmail.com>
        + 99 others); Tue, 30 Jun 2020 04:21:22 -0400
Received: from hqnvemgate26.nvidia.com ([216.228.121.65]:18705 "EHLO
        hqnvemgate26.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org
        with ESMTP id S1727919AbgF3IVV (ORCPT
        <rfc822;linux-kernel@vger.kernel.org>);
        Tue, 30 Jun 2020 04:21:21 -0400
Received: from hqpgpgate102.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate26.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA)
        id <B5efaf5f40000>; Tue, 30 Jun 2020 01:21:08 -0700
Received: from hqmail.nvidia.com ([172.20.161.6])
  by hqpgpgate102.nvidia.com (PGP Universal service);
  Tue, 30 Jun 2020 01:21:21 -0700
X-PGP-Universal: processed;
        by hqpgpgate102.nvidia.com on Tue, 30 Jun 2020 01:21:21 -0700
Received: from [10.26.75.203] (10.124.1.5) by HQMAIL107.nvidia.com
 (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Tue, 30 Jun
 2020 08:21:16 +0000
Subject: Re: [PATCH v8 2/3] dt-bindings: arm-smmu: Add binding for Tegra194
 SMMU
To:     Krishna Reddy <vdumpa@nvidia.com>
CC:     <joro@8bytes.org>, <will@kernel.org>, <robin.murphy@arm.com>,
        <linux-arm-kernel@lists.infradead.org>,
        <iommu@lists.linux-foundation.org>, <linux-kernel@vger.kernel.org>,
        <linux-tegra@vger.kernel.org>, <treding@nvidia.com>,
        <yhsu@nvidia.com>, <snikam@nvidia.com>, <praithatha@nvidia.com>,
        <talho@nvidia.com>, <bbiswas@nvidia.com>, <mperttunen@nvidia.com>,
        <nicolinc@nvidia.com>, <bhuntsman@nvidia.com>,
        <nicoleotsuka@gmail.com>
References: <20200630001051.12350-1-vdumpa@nvidia.com>
 <20200630001051.12350-3-vdumpa@nvidia.com>
From:   Jon Hunter <jonathanh@nvidia.com>
Message-ID: <06f4e802-11a2-3fb3-e334-9ba8533c9bcf@nvidia.com>
Date:   Tue, 30 Jun 2020 09:21:14 +0100
User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101
 Thunderbird/68.8.0
MIME-Version: 1.0
In-Reply-To: <20200630001051.12350-3-vdumpa@nvidia.com>
X-Originating-IP: [10.124.1.5]
X-ClientProxiedBy: HQMAIL111.nvidia.com (172.20.187.18) To
 HQMAIL107.nvidia.com (172.20.187.13)
Content-Type: text/plain; charset="utf-8"
Content-Language: en-US
Content-Transfer-Encoding: 7bit
DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1;
        t=1593505268; bh=DQaMRKB84VIKK0yEyIitEMeud5u93A+msqcYYHv6p/c=;
        h=X-PGP-Universal:Subject:To:CC:References:From:Message-ID:Date:
         User-Agent:MIME-Version:In-Reply-To:X-Originating-IP:
         X-ClientProxiedBy:Content-Type:Content-Language:
         Content-Transfer-Encoding;
        b=ScsXCOaLR7lc84hWPVEkKR7E/79SU8nX+bqRxSLfL/2V4nL+Zx/gBQ+Vwu19FaVh8
         y3vbFKJNcnF3Z1Z3KCH7OFroY7Et5HnG7MW+4fky7SqrHTGcv+fO17r6Yo3sxM5TwP
         n7Wf4FBuEZlJZA1ulq60Je/Fv/stOxXCoRHkCyE5giLyo/1Epac4aHJI1JPPdlWtDq
         VKlUSdI+yAkt5YCoBV4JVO5desmwc/UFk3A4JGtO0JvjmKX+jz37tJXtMhkzH93O3a
         Aah61KXLRl3NUSrR7YeGq18JT/vR8IewKg1lV2exSe/BVCVxTWm8ICICHMq6lTCHH8
         kQ/MrXaQMQGmQ==
Sender: linux-kernel-owner@vger.kernel.org
Precedence: bulk
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org


On 30/06/2020 01:10, Krishna Reddy wrote:
> Add binding for NVIDIA's Tegra194 SoC SMMU topology that is based
> on ARM MMU-500.
> 
> Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
> ---
>  Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
> index d7ceb4c34423b..5b2586ac715ed 100644
> --- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
> +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
> @@ -38,6 +38,11 @@ properties:
>                - qcom,sc7180-smmu-500
>                - qcom,sdm845-smmu-500
>            - const: arm,mmu-500
> +      - description: NVIDIA SoCs that use more than one "arm,mmu-500"
> +        items:
> +          - enum:
> +              - nvdia,tegra194-smmu

s/nvdia/nvidia

Jon

-- 
nvpublic