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From:   Mark Tomlinson <mark.tomlinson@alliedtelesis.co.nz>
To:     rjui@broadcom.com, sbranden@broadcom.com,
        bcm-kernel-feedback-list@broadcom.com, linus.walleij@linaro.org,
        linux-gpio@vger.kernel.org
Cc:     linux-kernel@vger.kernel.org,
        Mark Tomlinson <mark.tomlinson@alliedtelesis.co.nz>
Subject: [PATCH] pinctrl: nsp: Set irq handler based on trig type
Date:   Wed,  1 Jul 2020 08:47:04 +1200
Message-Id: <20200630204704.17736-1-mark.tomlinson@alliedtelesis.co.nz>
MIME-Version: 1.0
Content-Transfer-Encoding: quoted-printable
Sender: linux-kernel-owner@vger.kernel.org
Precedence: bulk

Rather than always using handle_simple_irq() as the gpio_irq_chip
handler, set a more appropriate handler based on the IRQ trigger type
requested. This is important for level triggered interrupts which need
to be masked during handling. Also, always acknowledge the interrupt
regardless of whether it is edge or level triggered.

Signed-off-by: Mark Tomlinson <mark.tomlinson@alliedtelesis.co.nz>
---
 drivers/pinctrl/bcm/pinctrl-nsp-gpio.c | 13 ++++++++-----
 1 file changed, 8 insertions(+), 5 deletions(-)

diff --git a/drivers/pinctrl/bcm/pinctrl-nsp-gpio.c b/drivers/pinctrl/bcm=
/pinctrl-nsp-gpio.c
index bed0124388c0..349fb384113e 100644
--- a/drivers/pinctrl/bcm/pinctrl-nsp-gpio.c
+++ b/drivers/pinctrl/bcm/pinctrl-nsp-gpio.c
@@ -174,11 +174,8 @@ static void nsp_gpio_irq_ack(struct irq_data *d)
 	struct nsp_gpio *chip =3D gpiochip_get_data(gc);
 	unsigned gpio =3D d->hwirq;
 	u32 val =3D BIT(gpio);
-	u32 trigger_type;
=20
-	trigger_type =3D irq_get_trigger_type(d->irq);
-	if (trigger_type & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING))
-		nsp_set_bit(chip, REG, NSP_GPIO_EVENT, gpio, val);
+	nsp_set_bit(chip, REG, NSP_GPIO_EVENT, gpio, val);
 }
=20
 /*
@@ -262,6 +259,12 @@ static int nsp_gpio_irq_set_type(struct irq_data *d,=
 unsigned int type)
=20
 	nsp_set_bit(chip, REG, NSP_GPIO_EVENT_INT_POLARITY, gpio, falling);
 	nsp_set_bit(chip, REG, NSP_GPIO_INT_POLARITY, gpio, level_low);
+
+	if (type & IRQ_TYPE_EDGE_BOTH)
+		irq_set_handler_locked(d, handle_edge_irq);
+	else
+		irq_set_handler_locked(d, handle_level_irq);
+
 	raw_spin_unlock_irqrestore(&chip->lock, flags);
=20
 	dev_dbg(chip->dev, "gpio:%u level_low:%s falling:%s\n", gpio,
@@ -691,7 +694,7 @@ static int nsp_gpio_probe(struct platform_device *pde=
v)
 		girq->num_parents =3D 0;
 		girq->parents =3D NULL;
 		girq->default_type =3D IRQ_TYPE_NONE;
-		girq->handler =3D handle_simple_irq;
+		girq->handler =3D handle_bad_irq;
 	}
=20
 	ret =3D devm_gpiochip_add_data(dev, gc, chip);
--=20
2.27.0