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[23.128.96.18]) by mx.google.com with ESMTP id n10si2676620ejb.539.2020.07.01.07.53.55; Wed, 01 Jul 2020 07:54:19 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@st.com header.s=STMicroelectronics header.b=QM9q5pCp; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=st.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731661AbgGAOxQ (ORCPT + 99 others); Wed, 1 Jul 2020 10:53:16 -0400 Received: from mx08-00178001.pphosted.com ([91.207.212.93]:57354 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1731652AbgGAOxO (ORCPT ); Wed, 1 Jul 2020 10:53:14 -0400 Received: from pps.filterd (m0046661.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 061EqmVh031192; Wed, 1 Jul 2020 16:53:04 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=st.com; h=from : to : subject : date : message-id : mime-version : content-type; s=STMicroelectronics; bh=bdHlVzSiINWMtq0PIwPjyqUpkq3kAK0eh4ceBdGsIYg=; b=QM9q5pCpptF+K8RgJ+0TnLo4Xh2Upreb+6UDCWCpulDftkyTw5TqQcNKAwwsoT43tcxE ZoZxQrvh7aPY2ybzRGtJehfISwbcJeio/HpSPegEn/+Uu/7JLJwWsg4/fZulhGr6AMYQ dYgXCFY8gWKQeFxPEjaCRZDzMjzAR4bt4lGCcI4p1q/ka7nK4BExvu/R+Y69m3fEWSNF ORZ+Wg4r49in86ZR2Qy4zyYXprUAGM/9Idd+9iTEYeMMJFqLGczwGwbLeUB8GvicbB8/ +5ms0W8iFrkW/9VM3VO2nC5B9XUdX4FGnXUaYOpqvIUZngHPPC6sYfjPNpinREVlC9rk AA== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 31ww0garwy-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 01 Jul 2020 16:53:04 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 96CE310002A; Wed, 1 Jul 2020 16:53:03 +0200 (CEST) Received: from Webmail-eu.st.com (sfhdag6node1.st.com [10.75.127.16]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 8767A2BE220; Wed, 1 Jul 2020 16:53:03 +0200 (CEST) Received: from localhost (10.75.127.47) by SFHDAG6NODE1.st.com (10.75.127.16) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Wed, 1 Jul 2020 16:53:03 +0200 From: Yannick Fertre To: Yannick Fertre , Philippe Cornu , Benjamin Gaignard , David Airlie , Daniel Vetter , Maxime Coquelin , Alexandre Torgue , , , , Subject: [PATCH] drm/bridge/synopsys: dsi: allows LP commands in video mode Date: Wed, 1 Jul 2020 16:52:58 +0200 Message-ID: <20200701145258.2782-1-yannick.fertre@st.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.75.127.47] X-ClientProxiedBy: SFHDAG7NODE1.st.com (10.75.127.19) To SFHDAG6NODE1.st.com (10.75.127.16) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.235,18.0.687 definitions=2020-07-01_08:2020-07-01,2020-07-01 signatures=0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Antonio Borneo Current code only sends LP commands in command mode. Allows sending LP commands also in video mode by setting the proper flag in DSI_VID_MODE_CFG. Signed-off-by: Antonio Borneo Change-Id: Ib78fa37bcc7559ce63017acd6ee0bbf00c61a397 Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/linux-stm32/+/153242 Reviewed-by: CITOOLS Reviewed-by: CIBUILD Reviewed-by: Yannick FERTRE Reviewed-by: Philippe CORNU Tested-by: Yannick FERTRE --- drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c b/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c index d580b2aa4ce9..0cd43e7a69bb 100644 --- a/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c +++ b/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c @@ -367,6 +367,13 @@ static void dw_mipi_message_config(struct dw_mipi_dsi *dsi, dsi_write(dsi, DSI_LPCLK_CTRL, lpm ? 0 : PHY_TXREQUESTCLKHS); dsi_write(dsi, DSI_CMD_MODE_CFG, val); + + val = dsi_read(dsi, DSI_VID_MODE_CFG); + if (lpm) + val |= ENABLE_LOW_POWER_CMD; + else + val &= ~ENABLE_LOW_POWER_CMD; + dsi_write(dsi, DSI_VID_MODE_CFG, val); } static int dw_mipi_dsi_gen_pkt_hdr_write(struct dw_mipi_dsi *dsi, u32 hdr_val) -- 2.17.1