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a="134880524" X-IronPort-AV: E=Sophos;i="5.75,300,1589266800"; d="scan'208";a="134880524" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Jul 2020 08:15:29 -0700 IronPort-SDR: hG50aIcMaWNua8XsiIa3dfTzMYvuO91zWluZon+wGAe+sZNe+ukBNlCkaQaQWEKfc8RkP7E/it Y0o6IcmEiv4w== X-IronPort-AV: E=Sophos;i="5.75,300,1589266800"; d="scan'208";a="455137547" Received: from rapyeatx-mobl3.amr.corp.intel.com (HELO [10.255.2.31]) ([10.255.2.31]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Jul 2020 08:15:23 -0700 Subject: Re: [RFC][PATCH 3/8] mm/vmscan: Attempt to migrate page in lieu of discard To: David Rientjes , Yang Shi Cc: Dave Hansen , linux-kernel@vger.kernel.org, linux-mm@kvack.org, kbusch@kernel.org, ying.huang@intel.com, dan.j.williams@intel.com References: <20200629234503.749E5340@viggo.jf.intel.com> <20200629234509.8F89C4EF@viggo.jf.intel.com> <039a5704-4468-f662-d660-668071842ca3@linux.alibaba.com> From: Dave Hansen Autocrypt: addr=dave.hansen@intel.com; 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Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.8.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 6/30/20 10:41 PM, David Rientjes wrote: > Maybe the strongest advantage of the node abstraction is the ability to > use autonuma and migrate_pages()/move_pages() API for moving pages > explicitly? Mempolicies could be used for migration to "top-tier" memory, > i.e. ZONE_NORMAL or ZONE_MOVABLE, instead. I totally agree that we _could_ introduce this new memory class as a zone. Doing it as nodes is pretty natural since the firmware today describes both slow (versus DRAM) and fast memory as separate nodes. It also means that apps can get visibility into placement with existing NUMA tooling and ABIs. To me, those are the two strongest reasons for PMEM. Looking to the future, I don't think the zone approach scales. I know folks want to build stuff within a single socket which is a mix of: 1. High-Bandwidth, on-package memory (a la MCDRAM) 2. DRAM 3. DRAM-cached PMEM (aka. "memory mode" PMEM) 4. Non-cached PMEM Right now, #1 doesn't exist on modern platform and #3/#4 can't be mixed (you only get 3 _or_ 4 at once). I'd love to provide something here that Intel can use to build future crazy platform configurations that don't require kernel enabling.