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[23.128.96.18]) by mx.google.com with ESMTP id v13si5469425ejc.348.2020.07.02.01.15.43; Thu, 02 Jul 2020 01:16:06 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@megous.com header.s=mail header.b=PIQjfStj; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=megous.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728243AbgGBIOv (ORCPT + 99 others); Thu, 2 Jul 2020 04:14:51 -0400 Received: from vps.xff.cz ([195.181.215.36]:39338 "EHLO vps.xff.cz" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726737AbgGBIOu (ORCPT ); Thu, 2 Jul 2020 04:14:50 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=megous.com; s=mail; t=1593677689; bh=tk8uBuson5lkX3tYR8sr4yIYj+Cn4xMjz/dtwtwOa/4=; h=From:To:Cc:Subject:Date:References:From; b=PIQjfStjDABIl3wXLAtUWLiFI6VG+AU/Idj0a39yOs/qFjIi5D/F83dqK+9VDdake +T0Kvhmsql0fn2NOpSJ0UlraOMLH6jO2U26Z+jImJn7j8nUnq8Kpv3Jo6y+rBhR/p+ +CwjDx7ZWQ5Q/NfhuBhxhauNwEzJT/Y8xbSDv5pU= From: Ondrej Jirman To: Rob Herring , Maxime Ripard , Chen-Yu Tsai , Icenowy Zheng Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Samuel Holland , Martijn Braam , Luca Weiss , Bhushan Shah , Ondrej Jirman , Linus Walleij Subject: [PATCH v8 1/2] arm64: dts: sun50i-a64-pinephone: Enable LCD support on PinePhone Date: Thu, 2 Jul 2020 10:14:31 +0200 Message-Id: <20200702081432.1727696-2-megous@megous.com> In-Reply-To: <20200702081432.1727696-1-megous@megous.com> References: <20200702081432.1727696-1-megous@megous.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Icenowy Zheng PinePhone uses PWM backlight and a XBD599 LCD panel over DSI for display. Backlight levels curve was optimized by Martijn Braam using a lux meter. Add its device nodes. Signed-off-by: Icenowy Zheng Signed-off-by: Martijn Braam Signed-off-by: Ondrej Jirman Acked-by: Linus Walleij --- .../allwinner/sun50i-a64-pinephone-1.1.dts | 19 +++++++++++ .../dts/allwinner/sun50i-a64-pinephone.dtsi | 33 +++++++++++++++++++ 2 files changed, 52 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.1.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.1.dts index 06a775c41664..3e99a87e9ce5 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.1.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone-1.1.dts @@ -9,3 +9,22 @@ / { model = "Pine64 PinePhone Braveheart (1.1)"; compatible = "pine64,pinephone-1.1", "allwinner,sun50i-a64"; }; + +&backlight { + power-supply = <®_ldo_io0>; + /* + * PWM backlight circuit on this PinePhone revision was changed since + * 1.0, and the lowest PWM duty cycle that doesn't lead to backlight + * being off is around 20%. Duty cycle for the lowest brightness level + * also varries quite a bit between individual boards, so the lowest + * value here was chosen as a safe default. + */ + brightness-levels = < + 774 793 814 842 + 882 935 1003 1088 + 1192 1316 1462 1633 + 1830 2054 2309 2596 + 2916 3271 3664 4096>; + num-interpolated-steps = <50>; + default-brightness-level = <400>; +}; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi index cefda145c3c9..a89425ad3727 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi @@ -16,6 +16,13 @@ aliases { serial0 = &uart0; }; + backlight: backlight { + compatible = "pwm-backlight"; + pwms = <&r_pwm 0 50000 PWM_POLARITY_INVERTED>; + enable-gpios = <&pio 7 10 GPIO_ACTIVE_HIGH>; /* PH10 */ + /* Backlight configuration differs per PinePhone revision. */ + }; + chosen { stdout-path = "serial0:115200n8"; }; @@ -84,6 +91,28 @@ &dai { status = "okay"; }; +&de { + status = "okay"; +}; + +&dphy { + status = "okay"; +}; + +&dsi { + vcc-dsi-supply = <®_dldo1>; + status = "okay"; + + panel@0 { + compatible = "xingbangda,xbd599"; + reg = <0>; + reset-gpios = <&pio 3 23 GPIO_ACTIVE_LOW>; /* PD23 */ + iovcc-supply = <®_dldo2>; + vcc-supply = <®_ldo_io0>; + backlight = <&backlight>; + }; +}; + &ehci0 { status = "okay"; }; @@ -188,6 +217,10 @@ &r_pio { */ }; +&r_pwm { + status = "okay"; +}; + &r_rsb { status = "okay"; -- 2.27.0