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[23.128.96.18]) by mx.google.com with ESMTP id z24si5297155eja.705.2020.07.02.01.50.45; Thu, 02 Jul 2020 01:51:08 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@redhat.com header.s=mimecast20190719 header.b=PdPQALN+; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=redhat.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726682AbgGBIrs (ORCPT + 99 others); Thu, 2 Jul 2020 04:47:48 -0400 Received: from us-smtp-delivery-1.mimecast.com ([205.139.110.120]:35222 "EHLO us-smtp-1.mimecast.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726089AbgGBIrs (ORCPT ); Thu, 2 Jul 2020 04:47:48 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1593679666; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=YVJt7Z/dNToOF5ECqIk3Tpf0aOSwxuJgI3T+TZ2/jJ0=; b=PdPQALN+zYe8LqwDdkFW4BrapubuWWiNaPfju6QSQII5Y9uAB9lnaYNAM2dHJaHoPi54rb XjJSNYM1KjhLyL6PWnvPhrafyACleyRCCyQ1nwuUNzsakPOWkqMQp5z5Eqt2sMxUoRTm5e L3guueBce11Pf03LCo6SV68tpmjWXcM= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-12-PV0_D8l2O-2aESY3krrdog-1; Thu, 02 Jul 2020 04:47:45 -0400 X-MC-Unique: PV0_D8l2O-2aESY3krrdog-1 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 768B7BFC0; Thu, 2 Jul 2020 08:47:43 +0000 (UTC) Received: from [10.36.112.70] (ovpn-112-70.ams2.redhat.com [10.36.112.70]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 8A5675C296; Thu, 2 Jul 2020 08:47:41 +0000 (UTC) Subject: Re: [PATCH v3 6/7] iommu/vt-d: Warn on out-of-range invalidation address To: Jacob Pan , iommu@lists.linux-foundation.org, LKML , Lu Baolu , Joerg Roedel , David Woodhouse Cc: Yi Liu , "Tian, Kevin" , Raj Ashok References: <1593617636-79385-1-git-send-email-jacob.jun.pan@linux.intel.com> <1593617636-79385-7-git-send-email-jacob.jun.pan@linux.intel.com> From: Auger Eric Message-ID: <7c265689-a23c-021b-27e7-beb3cd667a5f@redhat.com> Date: Thu, 2 Jul 2020 10:47:39 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.5.0 MIME-Version: 1.0 In-Reply-To: <1593617636-79385-7-git-send-email-jacob.jun.pan@linux.intel.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On 7/1/20 5:33 PM, Jacob Pan wrote: > For guest requested IOTLB invalidation, address and mask are provided as > part of the invalidation data. VT-d HW silently ignores any address bits > below the mask. SW shall also allow such case but give warning if > address does not align with the mask. This patch relax the fault > handling from error to warning and proceed with invalidation request > with the given mask. What I don't really get is the guest shouldn't do that. Don't we want to be more strict in that case and return an error? Thanks Eric > > Signed-off-by: Jacob Pan > --- > drivers/iommu/intel/iommu.c | 7 +++---- > 1 file changed, 3 insertions(+), 4 deletions(-) > > diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c > index 6a0c62c7395c..2e1b53ade784 100644 > --- a/drivers/iommu/intel/iommu.c > +++ b/drivers/iommu/intel/iommu.c > @@ -5439,13 +5439,12 @@ intel_iommu_sva_invalidate(struct iommu_domain *domain, struct device *dev, > > switch (BIT(cache_type)) { > case IOMMU_CACHE_INV_TYPE_IOTLB: > + /* HW will ignore LSB bits based on address mask */ > if (inv_info->granularity == IOMMU_INV_GRANU_ADDR && > size && > (inv_info->addr_info.addr & ((BIT(VTD_PAGE_SHIFT + size)) - 1))) { > - pr_err_ratelimited("Address out of range, 0x%llx, size order %llu\n", > - inv_info->addr_info.addr, size); > - ret = -ERANGE; > - goto out_unlock; > + pr_err_ratelimited("User address not aligned, 0x%llx, size order %llu\n", > + inv_info->addr_info.addr, size); > } > > /* >