Message-Id: <200603310059.k2V0x7g26953@unix-os.sc.intel.com>
From: "Chen, Kenneth W" <kenneth.w.chen@intel.com>
To: "'Christoph Lameter'" <clameter@sgi.com>
Cc: "Nick Piggin" <nickpiggin@yahoo.com.au>,
       "Zoltan Menyhart" <Zoltan.Menyhart@bull.net>,
       "Boehm, Hans" <hans.boehm@hp.com>,
       "Grundler, Grant G" <grant.grundler@hp.com>, <akpm@osdl.org>,
       <linux-kernel@vger.kernel.org>, <linux-ia64@vger.kernel.org>
Subject: RE: Synchronizing Bit operations V2
Date: Thu, 30 Mar 2006 16:59:52 -0800
MIME-Version: 1.0
Content-Type: text/plain;
	charset="us-ascii"
Content-Transfer-Encoding: 7bit
Thread-Index: AcZUXT4nYOxIpW/+TCuP3tK8FtFGuAAAGbPA
In-Reply-To: <Pine.LNX.4.64.0603301650220.2068@schroedinger.engr.sgi.com>
Sender: linux-kernel-owner@vger.kernel.org
Content-Length: 987
Lines: 22

Christoph Lameter wrote on Thursday, March 30, 2006 4:51 PM
> > > It precise the uncleanness in ia64 that such semantics are attached to 
> > > these bit operations which may lead people to depend on those. We need to 
> > > either make these explicit or not depend on them.
> > 
> > I know, I'm saying since it doesn't make any difference from API point of
> > view whether it is acq, rel, or no ordering, then just make them rel as a
> > "preferred" Operation on ia64.
> 
> That would make the behavior of clear_bit different from other bitops and 
> references to volatile pointers. I'd like to have this as consistent as 
> possible.

Yeah, but we just agreed that caller shouldn't be thinking clear_bit has
memory ordering at all.

- Ken
-
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/