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[23.128.96.18]) by mx.google.com with ESMTP id w6si11219515ejc.605.2020.07.05.15.19.00; Sun, 05 Jul 2020 15:19:22 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728493AbgGEWJl (ORCPT + 99 others); Sun, 5 Jul 2020 18:09:41 -0400 Received: from mx2.suse.de ([195.135.220.15]:44718 "EHLO mx2.suse.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727894AbgGEWJl (ORCPT ); Sun, 5 Jul 2020 18:09:41 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.221.27]) by mx2.suse.de (Postfix) with ESMTP id EDD5DAF33; Sun, 5 Jul 2020 22:09:39 +0000 (UTC) Subject: Re: [PATCH v1] arm64: dts: actions: Fix smp Bringing up secondary CPUs To: Matheus Castello Cc: manivannan.sadhasivam@linaro.org, robh+dt@kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-actions@lists.infradead.org References: <20200705191944.404933-1-matheus@castello.eng.br> From: =?UTF-8?Q?Andreas_F=c3=a4rber?= Organization: SUSE Software Solutions Germany GmbH Message-ID: <60c25ef8-761d-9108-a8b1-ea15678c496c@suse.de> Date: Mon, 6 Jul 2020 00:09:39 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.9.0 MIME-Version: 1.0 In-Reply-To: <20200705191944.404933-1-matheus@castello.eng.br> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Matheus, Am 05.07.20 um 21:19 schrieb Matheus Castello: > Change the enable-method to fix the failed to boot errors: > > [ 0.040330] smp: Bringing up secondary CPUs ... > [ 0.040683] psci: failed to boot CPU1 (-22) > [ 0.040691] CPU1: failed to boot: -22 > [ 0.041062] psci: failed to boot CPU2 (-22) > [ 0.041071] CPU2: failed to boot: -22 > [ 0.041408] psci: failed to boot CPU3 (-22) > [ 0.041417] CPU3: failed to boot: -22 > [ 0.041443] smp: Brought up 1 node, 1 CPU > [ 0.041451] SMP: Total of 1 processors activated. > > Tested on Caninos Labrador v3 based on Actions Semi S700. > > Signed-off-by: Matheus Castello > --- > arch/arm64/boot/dts/actions/s700.dtsi | 33 +++++++++++++++++++-------- > 1 file changed, 23 insertions(+), 10 deletions(-) NACK. For starters, if this were an actual fix, it should have a Fixes header. Don't do random changes in a single patch and call it a "fix". I don't see what changing the cell size has to do with smp, nor adding L2 cache. The latter could be a patch of its own, after fixes are applied (to avoid conflicts when backporting that fix to older branches). A cell size of two used to be perfectly valid, please checking the DT binding. Finally, you're changing generic S700 code here - you can't just break Cubieboard7 just because your Labrador has too old BL31 firmware. Can't you just update its TF-A firmware and use the standard PSCI interface for Linux? If not, then you should add your workaround to your module's/board's .dts(i) instead of the SoC's .dtsi. Thanks, Andreas -- SUSE Software Solutions Germany GmbH Maxfeldstr. 5, 90409 Nürnberg, Germany GF: Felix Imendörffer HRB 36809 (AG Nürnberg)