Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751103AbWCaRpa (ORCPT ); Fri, 31 Mar 2006 12:45:30 -0500 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1751152AbWCaRpa (ORCPT ); Fri, 31 Mar 2006 12:45:30 -0500 Received: from omx2-ext.sgi.com ([192.48.171.19]:54468 "EHLO omx2.sgi.com") by vger.kernel.org with ESMTP id S1751103AbWCaRp3 (ORCPT ); Fri, 31 Mar 2006 12:45:29 -0500 Date: Fri, 31 Mar 2006 09:45:18 -0800 (PST) From: Christoph Lameter To: Andi Kleen cc: Zoltan Menyhart , "Boehm, Hans" , "Grundler, Grant G" , "Chen, Kenneth W" , akpm@osdl.org, linux-kernel@vger.kernel.org, linux-ia64@vger.kernel.org Subject: Re: Synchronizing Bit operations V2 In-Reply-To: Message-ID: References: MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII Sender: linux-kernel-owner@vger.kernel.org X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 914 Lines: 21 On Fri, 31 Mar 2006, Andi Kleen wrote: > Christoph Lameter writes: > > MODE_BARRIER > > An atomic operation that is guaranteed to occur between > > previous and later memory operations. > I think it's a bad idea to create such an complicated interface. > The chances that an average kernel coder will get these right are > quite small. And it will be 100% untested outside IA64 I guess > and thus likely be always slightly buggy as kernel code continues > to change. Powerpc can do similar things AFAIK. Not sure what other arches have finer grained control over barriers but it could cover a lot of special cases for other processors as well. - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/