Date: Fri, 31 Mar 2006 09:46:56 -0800 (PST)
From: Christoph Lameter <clameter@sgi.com>
To: Andi Kleen <ak@suse.de>
cc: Hans Boehm <Hans.Boehm@hp.com>, Zoltan Menyhart <Zoltan.Menyhart@bull.net>,
       "Grundler, Grant G" <grant.grundler@hp.com>,
       "Chen, Kenneth W" <kenneth.w.chen@intel.com>, akpm@osdl.org,
       linux-kernel@vger.kernel.org, linux-ia64@vger.kernel.org
Subject: Re: Synchronizing Bit operations V2
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On Fri, 31 Mar 2006, Andi Kleen wrote:

> On Friday 31 March 2006 18:22, Hans Boehm wrote:
> 
> > My impression is that approach (1) tends not to stick, since it involves
> > a substantial performance hit on architectures on which the fence is
> > not implicitly included in atomic operations.  Those include Itanium and
> > PowerPC.
> 
> At least the PPC people are eating the overhead because back when they
> didn't they had a long string of subtle powerpc only bugs caused by that

PPC has barriers for both smb_mb_before/after cases. IMHO we should do the 
same for ia64 and not fuzz around.

> It's a stability/maintainability vs performance issue. I doubt the 
> performance advantage would be worth the additional work. I guess
> with the engineering time you would need to spend getting all this right
> you could do much more fruitful optimizations.

Agreed.

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