From: David Brownell <david-b@pacbell.net>
To: spi-devel-general@lists.sourceforge.net
Subject: Re: [spi-devel-general] Re: question on spi_bitbang
Date: Fri, 31 Mar 2006 11:32:06 -0800
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Cc: Kumar Gala <galak@kernel.crashing.org>,
       linux kernel mailing list <linux-kernel@vger.kernel.org>
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On Friday 31 March 2006 11:07 am, Kumar Gala wrote:
> My controller is just a shift register that I can set the ?
> characteristics of (bit length for example, reverse data).

I've got a patch somewhere to enable LSB-first transfers in the API,
though without an implementation, if you're interested.  I'll post it
as an RFC at some point.


> > The chipselect() call should only affect the chipselect signal and,
> > when you're activating a chip, its initial clock polarity.  Though
> > if you're not using the latest from the MM tree, that's also your
> > hook for ensuring that the SPI mode is set up right.
> 
> Why deal with just clock polarity and not clock phase as well in  
> chipselect()?

You could, but the point is that you _must_ set the initial polarity
before setting the chipselect.  Most SPI devices support modes 0 and 3,
and make the choice based on the clock polarity when chipselect goes
active.  Changing polarity later would start a transfer.  :)


> It sounds like with the new patch, I'll end up setting txrx_word[] to  
> the same function for all modes.

Yes, it does sound like that.  If that works for you, I'd like to see
that go into 2.6.17 kernels.

- Dave
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