Received: by 2002:a05:6902:102b:0:0:0:0 with SMTP id x11csp250135ybt; Tue, 7 Jul 2020 22:09:47 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwv/aOr8euPgXOtgH7m4DLV+rQ19Ptdd9fMMAfidACHtJkeab7PCfceXBA21qekmEyM85AQ X-Received: by 2002:aa7:c1d8:: with SMTP id d24mr66493708edp.178.1594184986926; Tue, 07 Jul 2020 22:09:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1594184986; cv=none; d=google.com; s=arc-20160816; b=vg3l2L2j/xF/u4aMWGJAPe9Wdf23/cU8bkdDnj+qyl0BtXQUN5g8u906nRczapIRrj Jy72TL/0heY97rswiSOGI37DUx9M8WpGsYKRm0T8mVaeECyL6NIDyVTTPqEk1Ogq0Aim sYTaxWMHTRyBwtdEXyRKoHAVbqou0tVyv20nRaLt+ZKDC+vX/RryFz1Acf5QfTAfjM6o 1QXtuSpEXz/du4kMP3RnwYQ5aSv8ze/6qSbNXRKkhHWZUgofdOADHWoCHG5iiyBqpY65 2UTXhcaNH69ja/x7rNE80j6/SWV5Z6eJkn4p09L9uyTSdyu/1tGdQGkqswG05sSqC4z8 zmdw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:dkim-signature:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from; bh=6CQp2EndGAsHY5pa6z4bimVuwFcu5YXxg7pdSknaz1U=; b=fyG2mNQB2qbCJYHcdfgi6P/AJbLOEPwJpYMNGbP+g87HL64fHHhrQEMf1JUmgcm2dv WLcUNvpieKSyxwu8Do8GIGuGHp6L7jZOZaiufp213HDTWKDYNWUKm7NY8qAnwgGRYbb2 gCxPkNacASEd4osGXD0LmjxCeIBfjvGfKBPce97u38LtPfcpj/i+R8iXFcV1Og+fyJEO wmzQbcPhbkGQBxq3dTrTYKZ4sNsDmtaYM7V69w9pd6QXQYzNyKGxdaIWomaWFhIa2q1J PnzdLiVc2GFYhRc5ZiiElSJg4M3H9bgzQzwR73yECiyRzKdXobluVGWS8fyIRNvBUqwX 0OYw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@nvidia.com header.s=n1 header.b=Vv35PyX4; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=nvidia.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id x24si438594eju.623.2020.07.07.22.09.23; Tue, 07 Jul 2020 22:09:46 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@nvidia.com header.s=n1 header.b=Vv35PyX4; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=nvidia.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729314AbgGHFAS (ORCPT + 99 others); Wed, 8 Jul 2020 01:00:18 -0400 Received: from hqnvemgate25.nvidia.com ([216.228.121.64]:4006 "EHLO hqnvemgate25.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728234AbgGHFAR (ORCPT ); Wed, 8 Jul 2020 01:00:17 -0400 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate25.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Tue, 07 Jul 2020 21:59:23 -0700 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Tue, 07 Jul 2020 22:00:17 -0700 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Tue, 07 Jul 2020 22:00:17 -0700 Received: from HQMAIL105.nvidia.com (172.20.187.12) by HQMAIL105.nvidia.com (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Wed, 8 Jul 2020 05:00:14 +0000 Received: from hqnvemgw03.nvidia.com (10.124.88.68) by HQMAIL105.nvidia.com (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via Frontend Transport; Wed, 8 Jul 2020 05:00:14 +0000 Received: from vdumpa-ubuntu.nvidia.com (Not Verified[172.17.173.140]) by hqnvemgw03.nvidia.com with Trustwave SEG (v7,5,8,10121) id ; Tue, 07 Jul 2020 22:00:14 -0700 From: Krishna Reddy To: , , , , , CC: , , , , , , , , , , , , , , Krishna Reddy Subject: [PATCH v10 4/5] dt-bindings: arm-smmu: add binding for Tegra194 SMMU Date: Tue, 7 Jul 2020 22:00:16 -0700 Message-ID: <20200708050017.31563-5-vdumpa@nvidia.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200708050017.31563-1-vdumpa@nvidia.com> References: <20200708050017.31563-1-vdumpa@nvidia.com> MIME-Version: 1.0 X-NVConfidentiality: public Content-Transfer-Encoding: quoted-printable Content-Type: text/plain DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1594184363; bh=6CQp2EndGAsHY5pa6z4bimVuwFcu5YXxg7pdSknaz1U=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:MIME-Version:X-NVConfidentiality: Content-Transfer-Encoding:Content-Type; b=Vv35PyX4GM09po/mN/t4So3jMjaV0A+3RTQXJ3prkzwKp7XHgrR4e9Ad98RkoB+xc az4hnTtvvZJqavTVeg2DwtrS1bVOGirdyWWFYJHcZTSFTrYUZExLPYqjrWEGwgXcH3 6Ix182QGpDqQLbaM24LG/cPEeLQ0mTOT3ws5hNlLKkQa7IgBRd4BCPHI9aE9iRGYgk 2F8etHa/pdEv0bO9vVXDfAGf1jSfgEpWNiicQcYKhBN466PL81oHDI3DKEZ4tzdAoS KXwNq8GRLdyQ4GLGr4/3pxNKKsRzNFm09wSdYdyKYpvZjVZ6yAIDhn0sLPpkxIl6pM Y4R0F9Nf8DVYQ== Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add binding for NVIDIA's Tegra194 SoC SMMU. Signed-off-by: Krishna Reddy --- .../devicetree/bindings/iommu/arm,smmu.yaml | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Docume= ntation/devicetree/bindings/iommu/arm,smmu.yaml index d7ceb4c34423..ac1f526c3424 100644 --- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml @@ -38,6 +38,11 @@ properties: - qcom,sc7180-smmu-500 - qcom,sdm845-smmu-500 - const: arm,mmu-500 + - description: NVIDIA SoCs that program two ARM MMU-500s identically + items: + - enum: + - nvidia,tegra194-smmu + - const: nvidia,smmu-500 - items: - const: arm,mmu-500 - const: arm,smmu-v2 @@ -138,6 +143,19 @@ required: =20 additionalProperties: false =20 +allOf: + - if: + properties: + compatible: + contains: + enum: + - nvidia,tegra194-smmu + then: + properties: + reg: + minItems: 2 + maxItems: 2 + examples: - |+ /* SMMU with stream matching or stream indexing */ --=20 2.26.2