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Subject: Re: [PATCH v9 0/3] phy: zynqmp: Add PHY driver for the Xilinx ZynqMP
 Gigabit Transceiver
To:     Laurent Pinchart <laurent.pinchart@ideasonboard.com>,
        Vinod Koul <vkoul@kernel.org>
Cc:     linux-kernel@vger.kernel.org,
        Kishon Vijay Abraham I <kishon@ti.com>,
        Anurag Kumar Vulisha <anurag.kumar.vulisha@xilinx.com>,
        Michal Simek <michal.simek@xilinx.com>
References: <20200629120054.29338-1-laurent.pinchart@ideasonboard.com>
 <20200629131917.GL2599@vkoul-mobl>
 <20200629134934.GE10681@pendragon.ideasonboard.com>
From:   Michal Simek <michal.simek@xilinx.com>
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Message-ID: <a4d70c35-d5c5-e487-b85a-ace55e3d6395@xilinx.com>
Date:   Wed, 8 Jul 2020 10:32:57 +0200
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On 29. 06. 20 15:49, Laurent Pinchart wrote:
> Hi Vinod,
> 
> On Mon, Jun 29, 2020 at 06:49:17PM +0530, Vinod Koul wrote:
>> On 29-06-20, 15:00, Laurent Pinchart wrote:
>>> Hello,
>>>
>>> The patch series adds a PHY driver for the Xilinx ZynqMP gigabit serial
>>> transceivers (PS-GTR). The PS-GTR is a set of 4 PHYs that can be used by
>>> the PCIe, USB 3.0, DisplayPort, SATA and Ethernet controllers that are
>>> part of the Serial I/O Unit (SIOU).
>>>
>>> The code is based on a previous version sent by Anurag Kumar Vulisha and
>>> available at [1]. The DT bindings have been converted to YAML, and both
>>> the bindings and the driver have been considerably reworked (and
>>> simplified). The most notable changes is the removal of manual handling
>>> of the reset lines of the PHY users (which belongs to the PHY users
>>> themselves), and moving to the standard PHY .power_on() and .configure()
>>> operations to replace functions that were previously exported by the
>>> driver. Please see individual patches for a more detailed changelog.
>>>
>>> Compared to v8, the series has been rebased on phy/next, and a minor
>>> issue in MAINTAINERS has been fixed.
>>
>> Thanks for quick rebase, Applied 1 & 2 now
> 
> Thank you. Michal, could you apply 3/3 to your tree ?

Will take care about this one.

Thanks,
Michal