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[23.128.96.18]) by mx.google.com with ESMTP id v18si43457edy.249.2020.07.08.07.10.12; Wed, 08 Jul 2020 07:10:36 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@st.com header.s=STMicroelectronics header.b=HhcRfR4F; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=st.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729498AbgGHOIz (ORCPT + 99 others); Wed, 8 Jul 2020 10:08:55 -0400 Received: from mx08-00178001.pphosted.com ([91.207.212.93]:45482 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1728148AbgGHOIz (ORCPT ); Wed, 8 Jul 2020 10:08:55 -0400 Received: from pps.filterd (m0046661.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 068E41hE002186; Wed, 8 Jul 2020 16:08:42 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=st.com; h=from : to : subject : date : message-id : mime-version : content-type; s=STMicroelectronics; bh=Bh+DwW0TqfiKlxh43rCoh2hS/GAP9fFXbNlOjmqZ/RU=; b=HhcRfR4FELadkvTJvSqfWbxNG74oFekTOmzhN6PIx1rdWXNe7wBIdqiIsePZegPXchNW We0kikYQaHvqOwintrIQYzJxptLfJR3/yQiGS8UlQwVCkxc2v21JVOfNtG1KouO74OWx 8Rsgc2DG11X90kCYHhQLNtfiOHPYGnUxNc6wiAxOSyoVLbeGbrmJHkH480yTM4KnfM34 6/dT4ZwnE6EQ+gD7IsUX9H/YY/5GMd283GG/4MUz7vkKkk+DKb+98gMBZxW3aE74Dr0F Z/aMrym21jOBYOnpiVIcIiIrzVvkbTzdVJ0M8eiZAwek/UXKvQPBEKLowzMyizqNuEIF Ig== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 322gnfqqg6-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 08 Jul 2020 16:08:42 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id BD417100038; Wed, 8 Jul 2020 16:08:40 +0200 (CEST) Received: from Webmail-eu.st.com (sfhdag6node1.st.com [10.75.127.16]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id A1A592C2317; Wed, 8 Jul 2020 16:08:40 +0200 (CEST) Received: from localhost (10.75.127.44) by SFHDAG6NODE1.st.com (10.75.127.16) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Wed, 8 Jul 2020 16:08:39 +0200 From: Yannick Fertre To: Yannick Fertre , Philippe Cornu , Benjamin Gaignard , David Airlie , Daniel Vetter , Maxime Coquelin , Alexandre Torgue , , , , Subject: [PATCH v2] drm/bridge/synopsys: dsi: allow LP commands in video mode Date: Wed, 8 Jul 2020 16:08:36 +0200 Message-ID: <20200708140836.32418-1-yannick.fertre@st.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.75.127.44] X-ClientProxiedBy: SFHDAG1NODE3.st.com (10.75.127.3) To SFHDAG6NODE1.st.com (10.75.127.16) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.235,18.0.687 definitions=2020-07-08_11:2020-07-08,2020-07-08 signatures=0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Antonio Borneo Current code only sends LP commands in command mode. Allows sending LP commands also in video mode by setting the proper flag in DSI_VID_MODE_CFG. Signed-off-by: Antonio Borneo --- drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c b/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c index 1a24ea648ef8..e9a0f42ff99f 100644 --- a/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c +++ b/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c @@ -89,6 +89,7 @@ #define VID_MODE_TYPE_NON_BURST_SYNC_EVENTS 0x1 #define VID_MODE_TYPE_BURST 0x2 #define VID_MODE_TYPE_MASK 0x3 +#define ENABLE_LOW_POWER_CMD BIT(15) #define VID_MODE_VPG_ENABLE BIT(16) #define VID_MODE_VPG_HORIZONTAL BIT(24) @@ -376,6 +377,13 @@ static void dw_mipi_message_config(struct dw_mipi_dsi *dsi, dsi_write(dsi, DSI_LPCLK_CTRL, lpm ? 0 : PHY_TXREQUESTCLKHS); dsi_write(dsi, DSI_CMD_MODE_CFG, val); + + val = dsi_read(dsi, DSI_VID_MODE_CFG); + if (lpm) + val |= ENABLE_LOW_POWER_CMD; + else + val &= ~ENABLE_LOW_POWER_CMD; + dsi_write(dsi, DSI_VID_MODE_CFG, val); } static int dw_mipi_dsi_gen_pkt_hdr_write(struct dw_mipi_dsi *dsi, u32 hdr_val) -- 2.17.1